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[PATCH v2 02/42] i386: DPPS rounding fix
From: |
Paul Brook |
Subject: |
[PATCH v2 02/42] i386: DPPS rounding fix |
Date: |
Sun, 24 Apr 2022 23:01:24 +0100 |
The DPPS (Dot Product) instruction is defined to first sum pairs of
intermediate results, then sum those values to get the final result.
i.e. (A+B)+(C+D)
We incrementally sum the results, i.e. ((A+B)+C)+D, which can result
in incorrect rouding.
For consistency, also remove the redundant (but harmless) add operation
from DPPD
Signed-off-by: Paul Brook <paul@nowt.org>
---
target/i386/ops_sse.h | 47 +++++++++++++++++++++++--------------------
1 file changed, 25 insertions(+), 22 deletions(-)
diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 535440f882..a5a48a20f6 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -1934,32 +1934,36 @@ SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP)
void glue(helper_dpps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t mask)
{
- float32 iresult = float32_zero;
+ float32 prod, iresult, iresult2;
+ /*
+ * We must evaluate (A+B)+(C+D), not ((A+B)+C)+D
+ * to correctly round the intermediate results
+ */
if (mask & (1 << 4)) {
- iresult = float32_add(iresult,
- float32_mul(d->ZMM_S(0), s->ZMM_S(0),
- &env->sse_status),
- &env->sse_status);
+ iresult = float32_mul(d->ZMM_S(0), s->ZMM_S(0), &env->sse_status);
+ } else {
+ iresult = float32_zero;
}
if (mask & (1 << 5)) {
- iresult = float32_add(iresult,
- float32_mul(d->ZMM_S(1), s->ZMM_S(1),
- &env->sse_status),
- &env->sse_status);
+ prod = float32_mul(d->ZMM_S(1), s->ZMM_S(1), &env->sse_status);
+ } else {
+ prod = float32_zero;
}
+ iresult = float32_add(iresult, prod, &env->sse_status);
if (mask & (1 << 6)) {
- iresult = float32_add(iresult,
- float32_mul(d->ZMM_S(2), s->ZMM_S(2),
- &env->sse_status),
- &env->sse_status);
+ iresult2 = float32_mul(d->ZMM_S(2), s->ZMM_S(2), &env->sse_status);
+ } else {
+ iresult2 = float32_zero;
}
if (mask & (1 << 7)) {
- iresult = float32_add(iresult,
- float32_mul(d->ZMM_S(3), s->ZMM_S(3),
- &env->sse_status),
- &env->sse_status);
+ prod = float32_mul(d->ZMM_S(3), s->ZMM_S(3), &env->sse_status);
+ } else {
+ prod = float32_zero;
}
+ iresult2 = float32_add(iresult2, prod, &env->sse_status);
+ iresult = float32_add(iresult, iresult2, &env->sse_status);
+
d->ZMM_S(0) = (mask & (1 << 0)) ? iresult : float32_zero;
d->ZMM_S(1) = (mask & (1 << 1)) ? iresult : float32_zero;
d->ZMM_S(2) = (mask & (1 << 2)) ? iresult : float32_zero;
@@ -1968,13 +1972,12 @@ void glue(helper_dpps, SUFFIX)(CPUX86State *env, Reg
*d, Reg *s, uint32_t mask)
void glue(helper_dppd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t mask)
{
- float64 iresult = float64_zero;
+ float64 iresult;
if (mask & (1 << 4)) {
- iresult = float64_add(iresult,
- float64_mul(d->ZMM_D(0), s->ZMM_D(0),
- &env->sse_status),
- &env->sse_status);
+ iresult = float64_mul(d->ZMM_D(0), s->ZMM_D(0), &env->sse_status);
+ } else {
+ iresult = float64_zero;
}
if (mask & (1 << 5)) {
iresult = float64_add(iresult,
--
2.36.0
- Re: [PATCH 2/4] TCG support for AVX, (continued)
[PATCH 4/4] AVX tests, Paul Brook, 2022/04/18
[PATCH v2 01/42] i386: pcmpestr 64-bit sign extension bug, Paul Brook, 2022/04/24
[PATCH v2 06/42] i386: Add CHECK_NO_VEX, Paul Brook, 2022/04/24
[PATCH v2 02/42] i386: DPPS rounding fix,
Paul Brook <=
[PATCH v2 09/42] i386: Helper macro for 256 bit AVX helpers, Paul Brook, 2022/04/24
[PATCH v2 07/42] Enforce VEX encoding restrictions, Paul Brook, 2022/04/24
[PATCH v2 08/42] i386: Add ZMM_OFFSET macro, Paul Brook, 2022/04/24
[PATCH v2 04/42] i386: Rework sse_op_table1, Paul Brook, 2022/04/24
[PATCH v2 05/42] i386: Rework sse_op_table6/7, Paul Brook, 2022/04/24