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[PULL 46/54] target/arm: Use tcg_constant for do_brk{2,3}
From: |
Peter Maydell |
Subject: |
[PULL 46/54] target/arm: Use tcg_constant for do_brk{2,3} |
Date: |
Thu, 28 Apr 2022 15:39:50 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
In these cases, 't' did double-duty as zero source and
temporary destination. Split the two uses and narrow
the scope of the temp.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-47-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-sve.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index e812f910cec..82bf094447b 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -3322,7 +3322,7 @@ static bool do_brk3(DisasContext *s, arg_rprr_s *a,
TCGv_ptr n = tcg_temp_new_ptr();
TCGv_ptr m = tcg_temp_new_ptr();
TCGv_ptr g = tcg_temp_new_ptr();
- TCGv_i32 t = tcg_const_i32(FIELD_DP32(0, PREDDESC, OPRSZ, vsz));
+ TCGv_i32 desc = tcg_constant_i32(FIELD_DP32(0, PREDDESC, OPRSZ, vsz));
tcg_gen_addi_ptr(d, cpu_env, pred_full_reg_offset(s, a->rd));
tcg_gen_addi_ptr(n, cpu_env, pred_full_reg_offset(s, a->rn));
@@ -3330,16 +3330,17 @@ static bool do_brk3(DisasContext *s, arg_rprr_s *a,
tcg_gen_addi_ptr(g, cpu_env, pred_full_reg_offset(s, a->pg));
if (a->s) {
- fn_s(t, d, n, m, g, t);
+ TCGv_i32 t = tcg_temp_new_i32();
+ fn_s(t, d, n, m, g, desc);
do_pred_flags(t);
+ tcg_temp_free_i32(t);
} else {
- fn(d, n, m, g, t);
+ fn(d, n, m, g, desc);
}
tcg_temp_free_ptr(d);
tcg_temp_free_ptr(n);
tcg_temp_free_ptr(m);
tcg_temp_free_ptr(g);
- tcg_temp_free_i32(t);
return true;
}
@@ -3356,22 +3357,23 @@ static bool do_brk2(DisasContext *s, arg_rpr_s *a,
TCGv_ptr d = tcg_temp_new_ptr();
TCGv_ptr n = tcg_temp_new_ptr();
TCGv_ptr g = tcg_temp_new_ptr();
- TCGv_i32 t = tcg_const_i32(FIELD_DP32(0, PREDDESC, OPRSZ, vsz));
+ TCGv_i32 desc = tcg_constant_i32(FIELD_DP32(0, PREDDESC, OPRSZ, vsz));
tcg_gen_addi_ptr(d, cpu_env, pred_full_reg_offset(s, a->rd));
tcg_gen_addi_ptr(n, cpu_env, pred_full_reg_offset(s, a->rn));
tcg_gen_addi_ptr(g, cpu_env, pred_full_reg_offset(s, a->pg));
if (a->s) {
- fn_s(t, d, n, g, t);
+ TCGv_i32 t = tcg_temp_new_i32();
+ fn_s(t, d, n, g, desc);
do_pred_flags(t);
+ tcg_temp_free_i32(t);
} else {
- fn(d, n, g, t);
+ fn(d, n, g, desc);
}
tcg_temp_free_ptr(d);
tcg_temp_free_ptr(n);
tcg_temp_free_ptr(g);
- tcg_temp_free_i32(t);
return true;
}
--
2.25.1
- [PULL 50/54] hw/arm/smmuv3: Cache event fault record, (continued)
- [PULL 50/54] hw/arm/smmuv3: Cache event fault record, Peter Maydell, 2022/04/28
- [PULL 53/54] target/arm: Advertise support for FEAT_BBM level 2, Peter Maydell, 2022/04/28
- [PULL 32/54] target/arm: Use tcg_constant in LDM, STM, Peter Maydell, 2022/04/28
- [PULL 27/54] target/arm: Use tcg_constant for gen_srs, Peter Maydell, 2022/04/28
- [PULL 28/54] target/arm: Use tcg_constant for op_s_{rri,rxi}_rot, Peter Maydell, 2022/04/28
- [PULL 30/54] target/arm: Use tcg_constant for v7m MRS, MSR, Peter Maydell, 2022/04/28
- [PULL 33/54] target/arm: Use tcg_constant in CLRM, DLS, WLS, LE, Peter Maydell, 2022/04/28
- [PULL 40/54] target/arm: Use tcg_constant in do_clast_scalar, Peter Maydell, 2022/04/28
- [PULL 45/54] target/arm: Use tcg_constant for predicate descriptors, Peter Maydell, 2022/04/28
- [PULL 42/54] target/arm: Use tcg_constant in LD1, ST1, Peter Maydell, 2022/04/28
- [PULL 46/54] target/arm: Use tcg_constant for do_brk{2,3},
Peter Maydell <=
- [PULL 47/54] target/arm: Use tcg_constant for vector descriptor, Peter Maydell, 2022/04/28
- [PULL 51/54] hw/arm/smmuv3: Add space in guest error message, Peter Maydell, 2022/04/28
- [PULL 25/54] target/arm: Use tcg_constant for vector shift expanders, Peter Maydell, 2022/04/28
- [PULL 38/54] target/arm: Use tcg_constant in FCPY, CPY, Peter Maydell, 2022/04/28
- [PULL 36/54] target/arm: Use tcg_constant for trans_INDEX_*, Peter Maydell, 2022/04/28
- [PULL 49/54] target/arm: Use field names for accessing DBGWCRn, Peter Maydell, 2022/04/28
- [PULL 31/54] target/arm: Use tcg_constant for TT, SAT, SMMLA, Peter Maydell, 2022/04/28
- [PULL 48/54] target/arm: Disable cryptographic instructions when neon is disabled, Peter Maydell, 2022/04/28
- [PULL 54/54] hw/arm/smmuv3: Advertise support for SMMUv3.2-BBML2, Peter Maydell, 2022/04/28
- Re: [PULL 00/54] target-arm queue, Richard Henderson, 2022/04/28