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[PULL 28/54] target/arm: Use tcg_constant for op_s_{rri,rxi}_rot
From: |
Peter Maydell |
Subject: |
[PULL 28/54] target/arm: Use tcg_constant for op_s_{rri,rxi}_rot |
Date: |
Thu, 28 Apr 2022 15:39:32 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-29-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 8476f259fcc..223fd5fdfe7 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -5495,18 +5495,16 @@ static bool op_s_rri_rot(DisasContext *s, arg_s_rri_rot
*a,
void (*gen)(TCGv_i32, TCGv_i32, TCGv_i32),
int logic_cc, StoreRegKind kind)
{
- TCGv_i32 tmp1, tmp2;
+ TCGv_i32 tmp1;
uint32_t imm;
imm = ror32(a->imm, a->rot);
if (logic_cc && a->rot) {
tcg_gen_movi_i32(cpu_CF, imm >> 31);
}
- tmp2 = tcg_const_i32(imm);
tmp1 = load_reg(s, a->rn);
- gen(tmp1, tmp1, tmp2);
- tcg_temp_free_i32(tmp2);
+ gen(tmp1, tmp1, tcg_constant_i32(imm));
if (logic_cc) {
gen_logic_CC(tmp1);
@@ -5525,9 +5523,10 @@ static bool op_s_rxi_rot(DisasContext *s, arg_s_rri_rot
*a,
if (logic_cc && a->rot) {
tcg_gen_movi_i32(cpu_CF, imm >> 31);
}
- tmp = tcg_const_i32(imm);
- gen(tmp, tmp);
+ tmp = tcg_temp_new_i32();
+ gen(tmp, tcg_constant_i32(imm));
+
if (logic_cc) {
gen_logic_CC(tmp);
}
--
2.25.1
- [PULL 37/54] target/arm: Use tcg_constant in SINCDEC, INCDEC, (continued)
- [PULL 37/54] target/arm: Use tcg_constant in SINCDEC, INCDEC, Peter Maydell, 2022/04/28
- [PULL 43/54] target/arm: Use tcg_constant in SUBR, Peter Maydell, 2022/04/28
- [PULL 44/54] target/arm: Use tcg_constant in do_zzi_{sat, ool}, do_fp_imm, Peter Maydell, 2022/04/28
- [PULL 52/54] target/arm: Advertise support for FEAT_TTL, Peter Maydell, 2022/04/28
- [PULL 26/54] target/arm: Use tcg_constant for do_coproc_insn, Peter Maydell, 2022/04/28
- [PULL 39/54] target/arm: Use tcg_constant in {incr, wrap}_last_active, Peter Maydell, 2022/04/28
- [PULL 50/54] hw/arm/smmuv3: Cache event fault record, Peter Maydell, 2022/04/28
- [PULL 53/54] target/arm: Advertise support for FEAT_BBM level 2, Peter Maydell, 2022/04/28
- [PULL 32/54] target/arm: Use tcg_constant in LDM, STM, Peter Maydell, 2022/04/28
- [PULL 27/54] target/arm: Use tcg_constant for gen_srs, Peter Maydell, 2022/04/28
- [PULL 28/54] target/arm: Use tcg_constant for op_s_{rri,rxi}_rot,
Peter Maydell <=
- [PULL 30/54] target/arm: Use tcg_constant for v7m MRS, MSR, Peter Maydell, 2022/04/28
- [PULL 33/54] target/arm: Use tcg_constant in CLRM, DLS, WLS, LE, Peter Maydell, 2022/04/28
- [PULL 40/54] target/arm: Use tcg_constant in do_clast_scalar, Peter Maydell, 2022/04/28
- [PULL 45/54] target/arm: Use tcg_constant for predicate descriptors, Peter Maydell, 2022/04/28
- [PULL 42/54] target/arm: Use tcg_constant in LD1, ST1, Peter Maydell, 2022/04/28
- [PULL 46/54] target/arm: Use tcg_constant for do_brk{2,3}, Peter Maydell, 2022/04/28
- [PULL 47/54] target/arm: Use tcg_constant for vector descriptor, Peter Maydell, 2022/04/28
- [PULL 51/54] hw/arm/smmuv3: Add space in guest error message, Peter Maydell, 2022/04/28
- [PULL 25/54] target/arm: Use tcg_constant for vector shift expanders, Peter Maydell, 2022/04/28
- [PULL 38/54] target/arm: Use tcg_constant in FCPY, CPY, Peter Maydell, 2022/04/28