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[PULL 04/37] hw/char: riscv_htif: Use conventional 's' for HTIFState
From: |
Alistair Francis |
Subject: |
[PULL 04/37] hw/char: riscv_htif: Use conventional 's' for HTIFState |
Date: |
Fri, 20 Jan 2023 17:38:40 +1000 |
From: Bin Meng <bmeng@tinylab.org>
QEMU source codes tend to use 's' to represent the hardware state.
Let's use it for HTIFState.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20221229091828.1945072-5-bmeng@tinylab.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/char/riscv_htif.c | 64 ++++++++++++++++++++++----------------------
1 file changed, 32 insertions(+), 32 deletions(-)
diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c
index e7e319ca1d..f28976b110 100644
--- a/hw/char/riscv_htif.c
+++ b/hw/char/riscv_htif.c
@@ -85,7 +85,7 @@ static int htif_can_recv(void *opaque)
*/
static void htif_recv(void *opaque, const uint8_t *buf, int size)
{
- HTIFState *htifstate = opaque;
+ HTIFState *s = opaque;
if (size != 1) {
return;
@@ -97,10 +97,10 @@ static void htif_recv(void *opaque, const uint8_t *buf, int
size)
* will drop characters
*/
- uint64_t val_written = htifstate->pending_read;
+ uint64_t val_written = s->pending_read;
uint64_t resp = 0x100 | *buf;
- htifstate->env->mfromhost = (val_written >> 48 << 48) | (resp << 16 >> 16);
+ s->env->mfromhost = (val_written >> 48 << 48) | (resp << 16 >> 16);
}
/*
@@ -142,7 +142,7 @@ static int htif_be_change(void *opaque)
* For RV32, the tohost register is zero-extended, so only device=0 and
* command=0 (i.e. HTIF syscalls/exit codes) are supported.
*/
-static void htif_handle_tohost_write(HTIFState *htifstate, uint64_t
val_written)
+static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written)
{
uint8_t device = val_written >> HTIF_DEV_SHIFT;
uint8_t cmd = val_written >> HTIF_CMD_SHIFT;
@@ -174,11 +174,11 @@ static void htif_handle_tohost_write(HTIFState
*htifstate, uint64_t val_written)
/* HTIF Console */
if (cmd == HTIF_CONSOLE_CMD_GETC) {
/* this should be a queue, but not yet implemented as such */
- htifstate->pending_read = val_written;
- htifstate->env->mtohost = 0; /* clear to indicate we read */
+ s->pending_read = val_written;
+ s->env->mtohost = 0; /* clear to indicate we read */
return;
} else if (cmd == HTIF_CONSOLE_CMD_PUTC) {
- qemu_chr_fe_write(&htifstate->chr, (uint8_t *)&payload, 1);
+ qemu_chr_fe_write(&s->chr, (uint8_t *)&payload, 1);
resp = 0x100 | (uint8_t)payload;
} else {
qemu_log("HTIF device %d: unknown command\n", device);
@@ -194,31 +194,31 @@ static void htif_handle_tohost_write(HTIFState
*htifstate, uint64_t val_written)
* With this code disabled, qemu works with bbl priv v1.9.1 and v1.10.
* HTIF needs protocol documentation and a more complete state machine.
*
- * while (!htifstate->fromhost_inprogress &&
- * htifstate->env->mfromhost != 0x0) {
+ * while (!s->fromhost_inprogress &&
+ * s->env->mfromhost != 0x0) {
* }
*/
- htifstate->env->mfromhost = (val_written >> 48 << 48) | (resp << 16 >> 16);
- htifstate->env->mtohost = 0; /* clear to indicate we read */
+ s->env->mfromhost = (val_written >> 48 << 48) | (resp << 16 >> 16);
+ s->env->mtohost = 0; /* clear to indicate we read */
}
-#define TOHOST_OFFSET1 (htifstate->tohost_offset)
-#define TOHOST_OFFSET2 (htifstate->tohost_offset + 4)
-#define FROMHOST_OFFSET1 (htifstate->fromhost_offset)
-#define FROMHOST_OFFSET2 (htifstate->fromhost_offset + 4)
+#define TOHOST_OFFSET1 (s->tohost_offset)
+#define TOHOST_OFFSET2 (s->tohost_offset + 4)
+#define FROMHOST_OFFSET1 (s->fromhost_offset)
+#define FROMHOST_OFFSET2 (s->fromhost_offset + 4)
/* CPU wants to read an HTIF register */
static uint64_t htif_mm_read(void *opaque, hwaddr addr, unsigned size)
{
- HTIFState *htifstate = opaque;
+ HTIFState *s = opaque;
if (addr == TOHOST_OFFSET1) {
- return htifstate->env->mtohost & 0xFFFFFFFF;
+ return s->env->mtohost & 0xFFFFFFFF;
} else if (addr == TOHOST_OFFSET2) {
- return (htifstate->env->mtohost >> 32) & 0xFFFFFFFF;
+ return (s->env->mtohost >> 32) & 0xFFFFFFFF;
} else if (addr == FROMHOST_OFFSET1) {
- return htifstate->env->mfromhost & 0xFFFFFFFF;
+ return s->env->mfromhost & 0xFFFFFFFF;
} else if (addr == FROMHOST_OFFSET2) {
- return (htifstate->env->mfromhost >> 32) & 0xFFFFFFFF;
+ return (s->env->mfromhost >> 32) & 0xFFFFFFFF;
} else {
qemu_log("Invalid htif read: address %016" PRIx64 "\n",
(uint64_t)addr);
@@ -230,25 +230,25 @@ static uint64_t htif_mm_read(void *opaque, hwaddr addr,
unsigned size)
static void htif_mm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- HTIFState *htifstate = opaque;
+ HTIFState *s = opaque;
if (addr == TOHOST_OFFSET1) {
- if (htifstate->env->mtohost == 0x0) {
- htifstate->allow_tohost = 1;
- htifstate->env->mtohost = value & 0xFFFFFFFF;
+ if (s->env->mtohost == 0x0) {
+ s->allow_tohost = 1;
+ s->env->mtohost = value & 0xFFFFFFFF;
} else {
- htifstate->allow_tohost = 0;
+ s->allow_tohost = 0;
}
} else if (addr == TOHOST_OFFSET2) {
- if (htifstate->allow_tohost) {
- htifstate->env->mtohost |= value << 32;
- htif_handle_tohost_write(htifstate, htifstate->env->mtohost);
+ if (s->allow_tohost) {
+ s->env->mtohost |= value << 32;
+ htif_handle_tohost_write(s, s->env->mtohost);
}
} else if (addr == FROMHOST_OFFSET1) {
- htifstate->fromhost_inprogress = 1;
- htifstate->env->mfromhost = value & 0xFFFFFFFF;
+ s->fromhost_inprogress = 1;
+ s->env->mfromhost = value & 0xFFFFFFFF;
} else if (addr == FROMHOST_OFFSET2) {
- htifstate->env->mfromhost |= value << 32;
- htifstate->fromhost_inprogress = 0;
+ s->env->mfromhost |= value << 32;
+ s->fromhost_inprogress = 0;
} else {
qemu_log("Invalid htif write: address %016" PRIx64 "\n",
(uint64_t)addr);
--
2.39.0
- [PULL 00/37] riscv-to-apply queue, Alistair Francis, 2023/01/20
- [PULL 02/37] hw/char: riscv_htif: Drop {to, from}host_size in HTIFState, Alistair Francis, 2023/01/20
- [PULL 01/37] hw/char: riscv_htif: Avoid using magic numbers, Alistair Francis, 2023/01/20
- [PULL 09/37] hw/riscv/boot.c: make riscv_find_firmware() static, Alistair Francis, 2023/01/20
- [PULL 06/37] hw/char: riscv_htif: Remove forward declarations for non-existent variables, Alistair Francis, 2023/01/20
- [PULL 10/37] hw/riscv/boot.c: introduce riscv_default_firmware_name(), Alistair Francis, 2023/01/20
- [PULL 03/37] hw/char: riscv_htif: Drop useless assignment of memory region, Alistair Francis, 2023/01/20
- [PULL 04/37] hw/char: riscv_htif: Use conventional 's' for HTIFState,
Alistair Francis <=
- [PULL 05/37] hw/char: riscv_htif: Move registers from CPUArchState to HTIFState, Alistair Francis, 2023/01/20
- [PULL 07/37] hw/char: riscv_htif: Support console output via proxy syscall, Alistair Francis, 2023/01/20
- [PULL 08/37] hw/riscv: spike: Remove the out-of-date comments, Alistair Francis, 2023/01/20
- [PULL 11/37] hw/riscv/boot.c: Introduce riscv_find_firmware(), Alistair Francis, 2023/01/20
- [PULL 12/37] hw/riscv: spike: Decouple create_fdt() dependency to ELF loading, Alistair Francis, 2023/01/20
- [PULL 13/37] target/riscv/cpu.c: Fix elen check, Alistair Francis, 2023/01/20
- [PULL 14/37] tests/avocado: add RISC-V OpenSBI boot test, Alistair Francis, 2023/01/20
- [PULL 16/37] hw/riscv/sifive_u: use 'fdt' from MachineState, Alistair Francis, 2023/01/20
- [PULL 15/37] hw/riscv/spike: use 'fdt' from MachineState, Alistair Francis, 2023/01/20
- [PULL 17/37] hw/riscv/boot.c: exit early if filename is NULL in load functions, Alistair Francis, 2023/01/20