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[PULL 29/37] hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_s
From: |
Alistair Francis |
Subject: |
[PULL 29/37] hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus() |
Date: |
Fri, 20 Jan 2023 17:39:05 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
create_fdt_socket_cpus() writes a different 'mmu-type' value if we're
running in 32 or 64 bits. However, the flag is being calculated during
virt_machine_init(), and is passed around in create_fdt(), then
create_fdt_socket(), and then finally create_fdt_socket_cpus(). None of
the intermediate functions are using the flag, which is a bit
misleading.
Remove 'is_32_bit' flag from create_fdt_socket_cpus() and calculate it
using the already available RISCVVirtState pointer. This will also
change the signature of create_fdt_socket() and create_fdt(), making it
clear that these functions don't do anything special when we're running
in 32 bit mode.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230111170948.316276-5-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/virt.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 1921d3caa3..99cb571024 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -223,12 +223,13 @@ static void create_pcie_irq_map(RISCVVirtState *s, void
*fdt, char *nodename,
static void create_fdt_socket_cpus(RISCVVirtState *s, int socket,
char *clust_name, uint32_t *phandle,
- bool is_32_bit, uint32_t *intc_phandles)
+ uint32_t *intc_phandles)
{
int cpu;
uint32_t cpu_phandle;
MachineState *mc = MACHINE(s);
char *name, *cpu_name, *core_name, *intc_name;
+ bool is_32_bit = riscv_is_32bit(&s->soc[0]);
for (cpu = s->soc[socket].num_harts - 1; cpu >= 0; cpu--) {
cpu_phandle = (*phandle)++;
@@ -721,7 +722,7 @@ static void create_fdt_pmu(RISCVVirtState *s)
}
static void create_fdt_sockets(RISCVVirtState *s, const MemMapEntry *memmap,
- bool is_32_bit, uint32_t *phandle,
+ uint32_t *phandle,
uint32_t *irq_mmio_phandle,
uint32_t *irq_pcie_phandle,
uint32_t *irq_virtio_phandle,
@@ -750,7 +751,7 @@ static void create_fdt_sockets(RISCVVirtState *s, const
MemMapEntry *memmap,
qemu_fdt_add_subnode(mc->fdt, clust_name);
create_fdt_socket_cpus(s, socket, clust_name, phandle,
- is_32_bit, &intc_phandles[phandle_pos]);
+ &intc_phandles[phandle_pos]);
create_fdt_socket_memory(s, memmap, socket);
@@ -998,8 +999,7 @@ static void create_fdt_fw_cfg(RISCVVirtState *s, const
MemMapEntry *memmap)
g_free(nodename);
}
-static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap,
- bool is_32_bit)
+static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap)
{
MachineState *mc = MACHINE(s);
uint32_t phandle = 1, irq_mmio_phandle = 1, msi_pcie_phandle = 1;
@@ -1031,9 +1031,9 @@ static void create_fdt(RISCVVirtState *s, const
MemMapEntry *memmap,
qemu_fdt_setprop_cell(mc->fdt, "/soc", "#size-cells", 0x2);
qemu_fdt_setprop_cell(mc->fdt, "/soc", "#address-cells", 0x2);
- create_fdt_sockets(s, memmap, is_32_bit, &phandle,
- &irq_mmio_phandle, &irq_pcie_phandle, &irq_virtio_phandle,
- &msi_pcie_phandle);
+ create_fdt_sockets(s, memmap, &phandle, &irq_mmio_phandle,
+ &irq_pcie_phandle, &irq_virtio_phandle,
+ &msi_pcie_phandle);
create_fdt_virtio(s, memmap, irq_virtio_phandle);
@@ -1507,7 +1507,7 @@ static void virt_machine_init(MachineState *machine)
virt_flash_map(s, system_memory);
/* create device tree */
- create_fdt(s, memmap, riscv_is_32bit(&s->soc[0]));
+ create_fdt(s, memmap);
s->machine_done.notify = virt_machine_done;
qemu_add_machine_init_done_notifier(&s->machine_done);
--
2.39.0
- [PULL 21/37] hw/riscv/boot.c: use MachineState in riscv_load_initrd(), (continued)
- [PULL 21/37] hw/riscv/boot.c: use MachineState in riscv_load_initrd(), Alistair Francis, 2023/01/20
- [PULL 22/37] hw/riscv/boot.c: use MachineState in riscv_load_kernel(), Alistair Francis, 2023/01/20
- [PULL 23/37] target/riscv/cpu: set cpu->cfg in register_cpu_props(), Alistair Francis, 2023/01/20
- [PULL 24/37] target/riscv/cpu.c: do not skip misa logic in riscv_cpu_realize(), Alistair Francis, 2023/01/20
- [PULL 26/37] hw/riscv/spike.c: simplify create_fdt(), Alistair Francis, 2023/01/20
- [PULL 28/37] hw/riscv/sifive_u.c: simplify create_fdt(), Alistair Francis, 2023/01/20
- [PULL 25/37] target/riscv: Use TARGET_FMT_lx for env->mhartid, Alistair Francis, 2023/01/20
- [PULL 30/37] hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id(), Alistair Francis, 2023/01/20
- [PULL 27/37] hw/riscv/virt.c: simplify create_fdt(), Alistair Francis, 2023/01/20
- [PULL 31/37] hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix(), Alistair Francis, 2023/01/20
- [PULL 29/37] hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus(),
Alistair Francis <=
- [PULL 32/37] target/riscv: Fix up masking of vsip/vsie accesses, Alistair Francis, 2023/01/20
- [PULL 33/37] target/riscv: Trap on writes to stimecmp from VS when hvictl.VTI=1, Alistair Francis, 2023/01/20
- [PULL 34/37] tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldst, Alistair Francis, 2023/01/20
- [PULL 35/37] target/riscv: Introduce helper_set_rounding_mode_chkfrm, Alistair Francis, 2023/01/20
- [PULL 37/37] hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init(), Alistair Francis, 2023/01/20
- [PULL 36/37] target/riscv: Remove helper_set_rod_rounding_mode, Alistair Francis, 2023/01/20
- Re: [PULL 00/37] riscv-to-apply queue, Peter Maydell, 2023/01/21