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[PULL 16/26] target/arm/sme: Reset SVE state in aarch64_set_svcr()
From: |
Peter Maydell |
Subject: |
[PULL 16/26] target/arm/sme: Reset SVE state in aarch64_set_svcr() |
Date: |
Mon, 23 Jan 2023 13:35:43 +0000 |
From: Richard Henderson <richard.henderson@linaro.org>
Move arm_reset_sve_state() calls to aarch64_set_svcr().
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-5-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 1 -
linux-user/aarch64/cpu_loop.c | 1 -
linux-user/aarch64/signal.c | 8 +-------
target/arm/helper.c | 13 +++++++++++++
target/arm/sme_helper.c | 10 ----------
5 files changed, 14 insertions(+), 19 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ef61849eb1d..f3ddc3b7793 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1124,7 +1124,6 @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
void aarch64_sve_change_el(CPUARMState *env, int old_el,
int new_el, bool el0_a64);
void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask);
-void arm_reset_sve_state(CPUARMState *env);
/*
* SVE registers are encoded in KVM's memory in an endianness-invariant format.
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index d53742e10bb..5e93d27d8f6 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -96,7 +96,6 @@ void cpu_loop(CPUARMState *env)
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
if (FIELD_EX64(env->svcr, SVCR, SM)) {
arm_rebuild_hflags(env);
- arm_reset_sve_state(env);
}
ret = do_syscall(env,
env->xregs[8],
diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c
index b6e4dcb494d..a326a6def5e 100644
--- a/linux-user/aarch64/signal.c
+++ b/linux-user/aarch64/signal.c
@@ -665,14 +665,8 @@ static void target_setup_frame(int usig, struct
target_sigaction *ka,
env->btype = 2;
}
- /*
- * Invoke the signal handler with both SM and ZA disabled.
- * When clearing SM, ResetSVEState, per SMSTOP.
- */
+ /* Invoke the signal handler with both SM and ZA disabled. */
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK);
- if (FIELD_EX64(env->svcr, SVCR, SM)) {
- arm_reset_sve_state(env);
- }
if (env->svcr) {
arm_rebuild_hflags(env);
}
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 24c069b8acf..0ac867c4119 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6725,11 +6725,24 @@ static CPAccessResult access_esm(CPUARMState *env,
const ARMCPRegInfo *ri,
return CP_ACCESS_OK;
}
+/* ResetSVEState */
+static void arm_reset_sve_state(CPUARMState *env)
+{
+ memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs));
+ /* Recall that FFR is stored as pregs[16]. */
+ memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs));
+ vfp_set_fpcr(env, 0x0800009f);
+}
+
void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask)
{
uint64_t change = (env->svcr ^ new) & mask;
env->svcr ^= change;
+
+ if (change & R_SVCR_SM_MASK) {
+ arm_reset_sve_state(env);
+ }
}
static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c
index 94dc084135d..f73bf4d2853 100644
--- a/target/arm/sme_helper.c
+++ b/target/arm/sme_helper.c
@@ -29,22 +29,12 @@
#include "vec_internal.h"
#include "sve_ldst_internal.h"
-/* ResetSVEState */
-void arm_reset_sve_state(CPUARMState *env)
-{
- memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs));
- /* Recall that FFR is stored as pregs[16]. */
- memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs));
- vfp_set_fpcr(env, 0x0800009f);
-}
-
void helper_set_pstate_sm(CPUARMState *env, uint32_t i)
{
if (i == FIELD_EX64(env->svcr, SVCR, SM)) {
return;
}
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
- arm_reset_sve_state(env);
arm_rebuild_hflags(env);
}
--
2.34.1
- [PULL 00/26] target-arm queue, Peter Maydell, 2023/01/23
- [PULL 01/26] target/arm: Widen cnthctl_el2 to uint64_t, Peter Maydell, 2023/01/23
- [PULL 07/26] hw/i2c/bitbang_i2c: Convert DPRINTF() to trace events, Peter Maydell, 2023/01/23
- [PULL 09/26] hw/i2c/versatile_i2c: Replace VersatileI2CState -> ArmSbconI2CState, Peter Maydell, 2023/01/23
- [PULL 15/26] target/arm/sme: Introduce aarch64_set_svcr(), Peter Maydell, 2023/01/23
- [PULL 11/26] hw/i2c/versatile_i2c: Use ARM_SBCON_I2C() macro, Peter Maydell, 2023/01/23
- [PULL 19/26] target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr(), Peter Maydell, 2023/01/23
- [PULL 22/26] target/arm: Don't set EXC_RETURN.ES if Security Extension not present, Peter Maydell, 2023/01/23
- [PULL 16/26] target/arm/sme: Reset SVE state in aarch64_set_svcr(),
Peter Maydell <=
- [PULL 21/26] target/arm: Fix in_debug path in S1_ptw_translate, Peter Maydell, 2023/01/23
- [PULL 18/26] target/arm/sme: Rebuild hflags in aarch64_set_svcr(), Peter Maydell, 2023/01/23
- [PULL 02/26] target/arm: Unify checking for M Main Extension in MRS/MSR, Peter Maydell, 2023/01/23
- [PULL 03/26] hw/i2c/bitbang_i2c: Define TYPE_GPIO_I2C in public header, Peter Maydell, 2023/01/23
- [PULL 04/26] hw/i2c/bitbang_i2c: Remove unused dummy MemoryRegion, Peter Maydell, 2023/01/23
- [PULL 08/26] hw/i2c/versatile_i2c: Drop useless casts from void * to pointer, Peter Maydell, 2023/01/23
- [PULL 06/26] hw/i2c/bitbang_i2c: Trace state changes, Peter Maydell, 2023/01/23
- [PULL 10/26] hw/i2c/versatile_i2c: Replace TYPE_VERSATILE_I2C -> TYPE_ARM_SBCON_I2C, Peter Maydell, 2023/01/23
- [PULL 05/26] hw/i2c/bitbang_i2c: Change state calling bitbang_i2c_set_state() helper, Peter Maydell, 2023/01/23
- [PULL 12/26] hw/i2c/versatile_i2c: Rename versatile_i2c -> arm_sbcon_i2c, Peter Maydell, 2023/01/23