[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[RFC PATCH 0/3] Add API for list cpu extensions
From: |
LIU Zhiwei |
Subject: |
[RFC PATCH 0/3] Add API for list cpu extensions |
Date: |
Fri, 25 Aug 2023 20:16:48 +0800 |
Some times we want to know what is the really mean of one cpu option.
For example, in RISC-V, we usually specify a cpu in this way:
-cpu rv64,v=on
If we don't look into the source code, we can't get the ISA extensions
of this -cpu command line.
In this patch set, we add one list_cpu_props API for common cores. It
will output the enabled ISA extensions.
In the near future, I will also list all possible user configurable
options and all possible extensions for this cpu.
In order to reuse the options parse code, I also add a QemuOptsList
for cpu.
After this patch, we can output the extensions for cpu,
"""
./qemu-system-riscv64 -cpu rv64,help
Enable extension:
rv64imafdch_zicbom_zicboz_zicsr_zifencei_zihintpause_zawrs_zfa_zba_zbb_zbc_zbs_sstc_svadu
"""
Notice currently this patch is only working for RISC-V system mode.
Thanks Andrew Jones for your suggestion!
Todo:
1) Output all possible user configurable options and all extensions.
2) Add support for RISC-V linux-user mode
3) Add support for other archs
LIU Zhiwei (3):
cpu: Add new API cpu_type_by_name
target/riscv: Add API list_cpu_props
softmmu/vl: Add qemu_cpu_opts QemuOptsList
cpu.c | 39 +++++++++++++++++++++++++++------------
include/exec/cpu-common.h | 1 +
include/hw/core/cpu.h | 11 +++++++++++
softmmu/vl.c | 35 +++++++++++++++++++++++++++++++++++
target/riscv/cpu.c | 10 ++++++++++
target/riscv/cpu.h | 2 ++
6 files changed, 86 insertions(+), 12 deletions(-)
--
2.17.1
- [RFC PATCH 0/3] Add API for list cpu extensions,
LIU Zhiwei <=