Before this patch,
"
qemu-system-riscv64 -device rv64-riscv-cpu,v=true,help
...
v=<bool> - Vector operations
...
"
After this patch,
"
v=<bool> - Vector operations (default: false)
"
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
---
target/riscv/cpu.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index c2f102fae1..38838cd2c0 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1728,6 +1728,7 @@ static void riscv_cpu_add_misa_properties(Object *cpu_obj)
int i;
for (i = 0; i < ARRAY_SIZE(misa_ext_cfgs); i++) {
+ ObjectProperty *op;
RISCVCPUMisaExtConfig *misa_cfg = &misa_ext_cfgs[i];
int bit = misa_cfg->misa_bit;
@@ -1739,14 +1740,13 @@ static void riscv_cpu_add_misa_properties(Object *cpu_obj)
continue;
}
- object_property_add(cpu_obj, misa_cfg->name, "bool",
- cpu_get_misa_ext_cfg,
- cpu_set_misa_ext_cfg,
- NULL, (void *)misa_cfg);
+ op = object_property_add(cpu_obj, misa_cfg->name, "bool",
+ cpu_get_misa_ext_cfg,
+ cpu_set_misa_ext_cfg,
+ NULL, (void *)misa_cfg);
object_property_set_description(cpu_obj, misa_cfg->name,
misa_cfg->description);
- object_property_set_bool(cpu_obj, misa_cfg->name,
- misa_cfg->enabled, NULL);
+ object_property_set_default_bool(op, misa_cfg->enabled);
}
}