[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH 07/20] target/riscv/cpu.c: add .instance_post_init()
From: |
Andrew Jones |
Subject: |
Re: [PATCH 07/20] target/riscv/cpu.c: add .instance_post_init() |
Date: |
Thu, 31 Aug 2023 13:00:49 +0200 |
On Fri, Aug 25, 2023 at 10:08:40AM -0300, Daniel Henrique Barboza wrote:
> All generic CPUs call riscv_cpu_add_user_properties(). The 'max' CPU
> calls riscv_init_max_cpu_extensions(). Both can be moved to a common
> instance_post_init() callback, implemented in riscv_cpu_post_init(),
> called by all CPUs. The call order then becomes:
>
> riscv_cpu_init() -> cpu_init() of each CPU -> .instance_post_init()
>
> A CPU class that wants to add user flags will let us know via the
> 'user_extension_properties' property. Likewise, 'cfg.max_features' will
> determine if any given CPU, regardless of being the 'max' CPU or not,
> wants to enable the maximum amount of extensions.
>
> In the near future riscv_cpu_post_init() will call the init() function
> of the current accelerator, providing a hook for KVM and TCG accel
> classes to change the init() process of the CPU.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
> target/riscv/cpu.c | 20 +++++++++++++++-----
> 1 file changed, 15 insertions(+), 5 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index c35d58c64b..f67b782675 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -430,8 +430,6 @@ static void riscv_max_cpu_init(Object *obj)
> mlx = MXL_RV32;
> #endif
> set_misa(env, mlx, 0);
> - riscv_cpu_add_user_properties(obj);
> - riscv_init_max_cpu_extensions(obj);
> env->priv_ver = PRIV_VERSION_LATEST;
> #ifndef CONFIG_USER_ONLY
> set_satp_mode_max_supported(RISCV_CPU(obj), mlx == MXL_RV32 ?
> @@ -445,7 +443,6 @@ static void rv64_base_cpu_init(Object *obj)
> CPURISCVState *env = &RISCV_CPU(obj)->env;
> /* We set this in the realise function */
> set_misa(env, MXL_RV64, 0);
> - riscv_cpu_add_user_properties(obj);
> /* Set latest version of privileged specification */
> env->priv_ver = PRIV_VERSION_LATEST;
> #ifndef CONFIG_USER_ONLY
> @@ -569,7 +566,6 @@ static void rv128_base_cpu_init(Object *obj)
> CPURISCVState *env = &RISCV_CPU(obj)->env;
> /* We set this in the realise function */
> set_misa(env, MXL_RV128, 0);
> - riscv_cpu_add_user_properties(obj);
> /* Set latest version of privileged specification */
> env->priv_ver = PRIV_VERSION_LATEST;
> #ifndef CONFIG_USER_ONLY
> @@ -582,7 +578,6 @@ static void rv32_base_cpu_init(Object *obj)
> CPURISCVState *env = &RISCV_CPU(obj)->env;
> /* We set this in the realise function */
> set_misa(env, MXL_RV32, 0);
> - riscv_cpu_add_user_properties(obj);
> /* Set latest version of privileged specification */
> env->priv_ver = PRIV_VERSION_LATEST;
> #ifndef CONFIG_USER_ONLY
> @@ -1212,6 +1207,20 @@ static void riscv_cpu_set_irq(void *opaque, int irq,
> int level)
> }
> #endif /* CONFIG_USER_ONLY */
>
> +static void riscv_cpu_post_init(Object *obj)
> +{
> + RISCVCPU *cpu = RISCV_CPU(obj);
> + RISCVCPUClass *rcc = RISCV_CPU_GET_CLASS(cpu);
> +
> + if (rcc->user_extension_properties) {
It's not yet clear to me why we need 'user_extension_properties'. Can't we
just do the 'object_dynamic_cast(obj, TYPE_RISCV_DYNAMIC_CPU) != NULL'
check here?
> + riscv_cpu_add_user_properties(obj);
> + }
> +
> + if (cpu->cfg.max_features) {
It's also not yet clear why we need max_features. I can't think of any
other models that want max_features besides 'max'. Checking the cpu type
here should be sufficient, no?
> + riscv_init_max_cpu_extensions(obj);
> + }
> +}
> +
> static void riscv_cpu_init(Object *obj)
> {
> RISCVCPU *cpu = RISCV_CPU(obj);
> @@ -2019,6 +2028,7 @@ static const TypeInfo riscv_cpu_type_infos[] = {
> .instance_size = sizeof(RISCVCPU),
> .instance_align = __alignof__(RISCVCPU),
> .instance_init = riscv_cpu_init,
> + .instance_post_init = riscv_cpu_post_init,
> .abstract = true,
> .class_size = sizeof(RISCVCPUClass),
> .class_init = riscv_cpu_class_init,
> --
> 2.41.0
>
>
Thanks,
drew
- [PATCH 02/20] target/riscv: move riscv_cpu_realize_tcg() to TCG::cpu_realizefn(), (continued)
- [PATCH 02/20] target/riscv: move riscv_cpu_realize_tcg() to TCG::cpu_realizefn(), Daniel Henrique Barboza, 2023/08/25
- [PATCH 04/20] target/riscv: move riscv_tcg_ops to tcg-cpu.c, Daniel Henrique Barboza, 2023/08/25
- [PATCH 03/20] target/riscv: move riscv_cpu_validate_set_extensions() to tcg-cpu.c, Daniel Henrique Barboza, 2023/08/25
- [PATCH 05/20] target/riscv/cpu.c: add 'user_extension_properties' class prop, Daniel Henrique Barboza, 2023/08/25
- [PATCH 06/20] target/riscv: add 'max_features' CPU flag, Daniel Henrique Barboza, 2023/08/25
- [PATCH 07/20] target/riscv/cpu.c: add .instance_post_init(), Daniel Henrique Barboza, 2023/08/25
- Re: [PATCH 07/20] target/riscv/cpu.c: add .instance_post_init(),
Andrew Jones <=
- [PATCH 09/20] target/riscv/cpu.c: mark extensions arrays as 'const', Daniel Henrique Barboza, 2023/08/25
- [PATCH 08/20] target/riscv: move 'host' CPU declaration to kvm.c, Daniel Henrique Barboza, 2023/08/25
- [PATCH 10/20] target/riscv: move riscv_cpu_add_kvm_properties() to kvm.c, Daniel Henrique Barboza, 2023/08/25
- [PATCH 11/20] target/riscv: introduce KVM AccelCPUClass, Daniel Henrique Barboza, 2023/08/25