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[PULL 52/65] target/riscv/cpu.c: add riscv_cpu_add_qdev_prop_array()
From: |
Alistair Francis |
Subject: |
[PULL 52/65] target/riscv/cpu.c: add riscv_cpu_add_qdev_prop_array() |
Date: |
Fri, 8 Sep 2023 16:04:18 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
The code inside riscv_cpu_add_user_properties() became quite repetitive
after recent changes. Add a helper to hide the repetition away.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20230901194627.1214811-8-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 29 +++++++++++++----------------
1 file changed, 13 insertions(+), 16 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 86d536f242..d484d63bcd 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1951,6 +1951,15 @@ static void cpu_set_cfg_unavailable(Object *obj, Visitor
*v,
}
#endif
+static void riscv_cpu_add_qdev_prop_array(DeviceState *dev, Property *array)
+{
+ g_assert(array);
+
+ for (Property *prop = array; prop && prop->name; prop++) {
+ qdev_property_add_static(dev, prop);
+ }
+}
+
#ifndef CONFIG_USER_ONLY
static void riscv_cpu_add_kvm_unavail_prop(Object *obj, const char *prop_name)
{
@@ -2007,7 +2016,6 @@ static void riscv_cpu_add_kvm_properties(Object *obj)
*/
static void riscv_cpu_add_user_properties(Object *obj)
{
- Property *prop;
DeviceState *dev = DEVICE(obj);
#ifndef CONFIG_USER_ONLY
@@ -2021,21 +2029,10 @@ static void riscv_cpu_add_user_properties(Object *obj)
riscv_cpu_add_misa_properties(obj);
- for (prop = riscv_cpu_extensions; prop && prop->name; prop++) {
- qdev_property_add_static(dev, prop);
- }
-
- for (prop = riscv_cpu_options; prop && prop->name; prop++) {
- qdev_property_add_static(dev, prop);
- }
-
- for (prop = riscv_cpu_vendor_exts; prop && prop->name; prop++) {
- qdev_property_add_static(dev, prop);
- }
-
- for (prop = riscv_cpu_experimental_exts; prop && prop->name; prop++) {
- qdev_property_add_static(dev, prop);
- }
+ riscv_cpu_add_qdev_prop_array(dev, riscv_cpu_extensions);
+ riscv_cpu_add_qdev_prop_array(dev, riscv_cpu_options);
+ riscv_cpu_add_qdev_prop_array(dev, riscv_cpu_vendor_exts);
+ riscv_cpu_add_qdev_prop_array(dev, riscv_cpu_experimental_exts);
}
static Property riscv_cpu_properties[] = {
--
2.41.0
- [PULL 45/65] target/riscv: don't read CSR in riscv_csrrw_do64, (continued)
- [PULL 49/65] target/riscv: add DEFINE_PROP_END_OF_LIST() to riscv_cpu_options[], Alistair Francis, 2023/09/08
- [PULL 50/65] target/riscv/cpu.c: split non-ratified exts from riscv_cpu_extensions[], Alistair Francis, 2023/09/08
- [PULL 51/65] target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[], Alistair Francis, 2023/09/08
- [PULL 52/65] target/riscv/cpu.c: add riscv_cpu_add_qdev_prop_array(),
Alistair Francis <=
- [PULL 53/65] target/riscv/cpu.c: add riscv_cpu_add_kvm_unavail_prop_array(), Alistair Francis, 2023/09/08
- [PULL 54/65] target/riscv/cpu.c: limit cfg->vext_spec log message, Alistair Francis, 2023/09/08
- [PULL 55/65] target/riscv: add 'max' CPU type, Alistair Francis, 2023/09/08
- [PULL 56/65] avocado, risc-v: add tuxboot tests for 'max' CPU, Alistair Francis, 2023/09/08
- [PULL 57/65] target/riscv: deprecate the 'any' CPU type, Alistair Francis, 2023/09/08
- [PULL 58/65] target/riscv/cpu.c: use offset in isa_ext_is_enabled/update_enabled, Alistair Francis, 2023/09/08
- [PULL 59/65] target/riscv: make CPUCFG() macro public, Alistair Francis, 2023/09/08
- [PULL 60/65] target/riscv/cpu.c: introduce cpu_cfg_ext_auto_update(), Alistair Francis, 2023/09/08
- [PULL 61/65] target/riscv/cpu.c: use cpu_cfg_ext_auto_update() during realize(), Alistair Francis, 2023/09/08
- [PULL 62/65] target/riscv/cpu.c: introduce RISCVCPUMultiExtConfig, Alistair Francis, 2023/09/08