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Re: assert in qemu under tcg in an smp case

From: Fabiano Rosas
Subject: Re: assert in qemu under tcg in an smp case
Date: Tue, 22 Jun 2021 16:34:54 -0300

Ivan Warren <ivan@vmfacility.fr> writes:

> Hello,
> I know this is not a sanctioned or supported case but anyways...
> I am getting this situation when ipling/booting AIX (7.2 TL5 SP2) in a 
> virtual SMP environment (8 virtual CPUS) with TCG :
> ERROR:../../src/qemu/accel/tcg/tcg-accel-ops-mttcg.c:85:mttcg_cpu_thread_fn: 
> assertion failed: (cpu->halted)
> the asset occurs very late during the boot process.

Hm.. Maybe the first CPU is starting with halted=1, but the secondaries are

For reference, in spapr_create_vcpu we have:

   * All CPUs start halted. CPU0 is unhalted from the machine level reset code
   * and the rest are explicitly started up by the guest using an RTAS call.
  cs->start_powered_off = true;

And in cpu_common_reset:

  cpu->halted = cpu->start_powered_off;

So it would be interesting to track the value of these two variables
throughout the code. I see, for instance, that e500 code (ppce500_init)
sets 'start-powered-off' for all secondary cpus. But the 40p code
(ibm_40p_init) does not. Depending on what -machine option you are using
we might me missing some tweaks to the initial cpu state.

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