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Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO
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From: |
Alistair Francis |
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Subject: |
Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device |
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Date: |
Wed, 21 Nov 2018 10:34:26 -0800 |
On Wed, Nov 21, 2018 at 10:07 AM Logan Gunthorpe <address@hidden> wrote:
>
>
> On 2018-11-21 10:03 a.m., Alistair Francis wrote:
> > + pci_bus = PCI_HOST_BRIDGE(dev)->bus;
> > +
> > + for (i = 0; i < nb_nics; i++) {
> > + NICInfo *nd = &nd_table[i];
> > +
> > + if (!nd->model) {
> > + nd->model = g_strdup("virtio");
> > + }
> > +
> > + pci_nic_init_nofail(nd, pci_bus, nd->model, NULL);
> > + }
>
> I don't understand what this patch actually accomplishes. It doesn't
> seem to affect my network devices when running QEMU. Can you provide a
> commit message explaining this?
Could you connect a PCIe networking device without this commit? This
is what the other architectures all do as well.
I'll rejig the commit message/title to make this clearer.
Alistair
>
> Thanks,
>
> Logan
- Re: [Qemu-riscv] [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, (continued)
- Re: [Qemu-riscv] [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Palmer Dabbelt, 2018/11/21
- Re: [Qemu-riscv] [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Guenter Roeck, 2018/11/21
- Re: [Qemu-riscv] [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Palmer Dabbelt, 2018/11/21
- Re: [Qemu-riscv] [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Palmer Dabbelt, 2018/11/26
- Re: [Qemu-riscv] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Guenter Roeck, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Logan Gunthorpe, 2018/11/21
[Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device,
Alistair Francis <=
- Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Logan Gunthorpe, 2018/11/21
Re: [Qemu-riscv] [PATCH for-3.2 v7 0/6] Connect a PCIe host and graphics support to RISC-V, Andrea Bolognani, 2018/11/22