[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-riscv] [PULL 14/47] riscv: hw: Remove duplicated "hw/hw.h" inclusi
From: |
Palmer Dabbelt |
Subject: |
[Qemu-riscv] [PULL 14/47] riscv: hw: Remove duplicated "hw/hw.h" inclusion |
Date: |
Tue, 10 Sep 2019 12:04:40 -0700 |
From: Bin Meng <address@hidden>
Commit a27bd6c779ba ("Include hw/qdev-properties.h less") wrongly
added "hw/hw.h" to sifive_prci.c and sifive_test.c.
Another inclusion of "hw/hw.h" was later added via
commit 650d103d3ea9 ("Include hw/hw.h exactly where needed"), that
resulted in duplicated inclusion of "hw/hw.h".
Fixes: a27bd6c779ba ("Include hw/qdev-properties.h less")
Signed-off-by: Bin Meng <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>
---
hw/riscv/sifive_prci.c | 1 -
hw/riscv/sifive_test.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/hw/riscv/sifive_prci.c b/hw/riscv/sifive_prci.c
index 9837b6166f..562bc3dc4c 100644
--- a/hw/riscv/sifive_prci.c
+++ b/hw/riscv/sifive_prci.c
@@ -19,7 +19,6 @@
*/
#include "qemu/osdep.h"
-#include "hw/hw.h"
#include "hw/sysbus.h"
#include "qemu/module.h"
#include "target/riscv/cpu.h"
diff --git a/hw/riscv/sifive_test.c b/hw/riscv/sifive_test.c
index 3557e16701..711740939e 100644
--- a/hw/riscv/sifive_test.c
+++ b/hw/riscv/sifive_test.c
@@ -19,7 +19,6 @@
*/
#include "qemu/osdep.h"
-#include "hw/hw.h"
#include "hw/sysbus.h"
#include "qemu/module.h"
#include "sysemu/runstate.h"
--
2.21.0
- [Qemu-riscv] [PULL 04/47] target/riscv/pmp: Restrict priviledged PMP to system-mode emulation, (continued)
- [Qemu-riscv] [PULL 04/47] target/riscv/pmp: Restrict priviledged PMP to system-mode emulation, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 05/47] target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace events, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 06/47] riscv: plic: Remove unused interrupt functions, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 07/47] target/riscv: Create function to test if FP is enabled, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 08/47] target/riscv: Update the Hypervisor CSRs to v0.4, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 09/47] riscv: rv32: Root page table address can be larger than 32-bit, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 10/47] riscv: Add a helper routine for finding firmware, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 11/47] riscv: Resolve full path of the given bios image, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 13/47] riscv: sifive_test: Add reset functionality, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 12/47] riscv: hmp: Add a command to show virtual memory mappings, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 14/47] riscv: hw: Remove duplicated "hw/hw.h" inclusion,
Palmer Dabbelt <=
- [Qemu-riscv] [PULL 15/47] riscv: hw: Remove superfluous "linux, phandle" property, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 16/47] riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 17/47] riscv: hw: Remove not needed PLIC properties in device tree, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 18/47] riscv: hw: Change create_fdt() to return void, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 19/47] riscv: hw: Change to use qemu_log_mask(LOG_GUEST_ERROR, ...) instead, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 20/47] riscv: hw: Remove the unnecessary include of target/riscv/cpu.h, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 22/47] riscv: sifive_u: Remove the unnecessary include of prci header, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 21/47] riscv: roms: Remove executable attribute of opensbi images, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 24/47] riscv: sifive_e: prci: Fix a typo of hfxosccfg register programming, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 23/47] riscv: sifive: Rename sifive_prci.{c, h} to sifive_e_prci.{c, h}, Palmer Dabbelt, 2019/09/11