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[PATCH v6 1/6] riscv/opentitan: Fix the ROM size
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From: |
Alistair Francis |
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Subject: |
[PATCH v6 1/6] riscv/opentitan: Fix the ROM size |
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Date: |
Wed, 10 Jun 2020 15:12:11 -0700 |
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reported-by: Damien Hedde <damien.hedde@greensocs.com>
---
hw/riscv/opentitan.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index b4fb836466..6c7359c190 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -30,7 +30,7 @@ static const struct MemmapEntry {
hwaddr base;
hwaddr size;
} ibex_memmap[] = {
- [IBEX_ROM] = { 0x00008000, 0xc000 },
+ [IBEX_ROM] = { 0x00008000, 16 * KiB },
[IBEX_RAM] = { 0x10000000, 0x10000 },
[IBEX_FLASH] = { 0x20000000, 0x80000 },
[IBEX_UART] = { 0x40000000, 0x10000 },
--
2.26.2
- [PATCH v6 0/6] RISC-V Add the OpenTitan Machine, Alistair Francis, 2020/06/10
- [PATCH v6 1/6] riscv/opentitan: Fix the ROM size,
Alistair Francis <=
- [PATCH v6 2/6] hw/char: Initial commit of Ibex UART, Alistair Francis, 2020/06/10
- [PATCH v6 3/6] hw/intc: Initial commit of lowRISC Ibex PLIC, Alistair Francis, 2020/06/10
- [PATCH v6 4/6] riscv/opentitan: Connect the PLIC device, Alistair Francis, 2020/06/10
- [PATCH v6 5/6] riscv/opentitan: Connect the UART device, Alistair Francis, 2020/06/10
- [PATCH v6 6/6] target/riscv: Use a smaller guess size for no-MMU PMP, Alistair Francis, 2020/06/10