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Pointer Masking prototype for RISC-V QEMU

From: Alexey Baturo
Subject: Pointer Masking prototype for RISC-V QEMU
Date: Sun, 4 Oct 2020 20:50:15 +0300

Hi folks,

I've implemented support for RISC-V Pointer Masking proposal developed by J-ext workgroup. The initial prototype was for QEMU 4.1 and later I moved it to the current vesrsion(5.1).
Could you please help me to clarify some things:
- I'd like to commit this functionality to the QEMU(mainline or separate branch), do you think it's possible at this stage?
- Could you please describe the proper process of commiting such new functionality to QEMU?
- What are the requirements for test coverage of this new functionality and what test infra should be used to measure it?
- If this functionality is deemed to be acceptable for QEMU, how does the review process looks like?
- Also it's possible to implement Memory Tagging extension similarly as ARMv8.5 has: it would reuse a lot of part from Pointer Masking. I've done initial prototype of such extension, does it make sence to try to push such experimetal features to qemu? If yes, what are the prerequisites?


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