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[PATCH v4 0/5] Fix the Hypervisor access functions


From: Alistair Francis
Subject: [PATCH v4 0/5] Fix the Hypervisor access functions
Date: Tue, 3 Nov 2020 20:43:20 -0800

Richard pointed out that the Hypervisor access functions don't work
correctly, see:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg751540.html.
This seris fixes them up by adding a new MMU index for the virtualised
state.
v4:
 - Consolidate the inline helper to a helper function
 - Actually don't have a virtualised MMU index
v3:
 - Don't use an external helper
v2:
 - Use only 6 MMU modes instead of 8

Alistair Francis (5):
  target/riscv: Add a virtualised MMU Mode
  target/riscv: Set the virtualised MMU mode when doing hyp accesses
  target/riscv: Remove the HS_TWO_STAGE flag
  target/riscv: Remove the hyp load and store functions
  target/riscv: Split the Hypervisor execute load helpers

 target/riscv/cpu-param.h                |  11 +-
 target/riscv/cpu.h                      |  19 +++-
 target/riscv/cpu_bits.h                 |   1 -
 target/riscv/helper.h                   |   5 +-
 target/riscv/cpu_helper.c               |  62 +++++-----
 target/riscv/op_helper.c                | 124 +-------------------
 target/riscv/translate.c                |   2 +
 target/riscv/insn_trans/trans_rvh.c.inc | 143 +++++++++---------------
 8 files changed, 112 insertions(+), 255 deletions(-)

-- 
2.28.0




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