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Re: [PATCH 0/1] CLINT timebase frequency is invalid for sifive machines


From: Emmanuel Blot
Subject: Re: [PATCH 0/1] CLINT timebase frequency is invalid for sifive machines
Date: Mon, 16 Nov 2020 12:42:58 +0100

On 3 Nov 2020, at 16:38, Emmanuel Blot wrote:

ping

CLINT mtime is a 64-bit read-write register that contains the number of cycles counted from the rtcclk input. rtcclk clock for sifive machines is currently defined as 10MHz, while the real HW use a 32.768KHz RTC clock source on FU310
(sifive_e) and 1MHz on FU540 (sifive_u).

Emmanuel Blot (1):
  hw/riscv: clint: timebase-freq is machine-specific

 hw/riscv/sifive_e.c            | 2 +-
 hw/riscv/sifive_u.c            | 4 ++--
 hw/riscv/spike.c               | 4 ++--
 hw/riscv/virt.c                | 4 ++--
 include/hw/intc/sifive_clint.h | 4 ----
 include/hw/riscv/sifive_e.h    | 2 ++
 include/hw/riscv/sifive_u.h    | 2 ++
 include/hw/riscv/spike.h       | 2 ++
 include/hw/riscv/virt.h        | 2 ++
 9 files changed, 15 insertions(+), 11 deletions(-)

--
2.28.0



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