Re: [PATCH v2 3/6] target/riscv: add support for zfinx

[Richard Henderson]

On 12/31/21 10:05 PM, Weiwei Li wrote:
> 在 2022/1/1 上午4:06, Richard Henderson 写道:
> > On 12/30/21 7:23 PM, Weiwei Li wrote:
> > > +    if (reg_num != 0) {
> > > +        switch (get_ol(ctx)) {
> >
> > Oh, you should be using get_xl here and elsewhere in this patch, not get_ol.
>
> Sorry. I don't know the difference between get_xl and  get_ol. From gpr register 
> read/write function, It seems get_ol is used in register read, and get_xl is used in 
> register write.
>
> However, "ctx->ol= ctx->xl;" is executed before translate instruction.

ol is the operation length; xl is the register length.

In this case, the operation length doesn't matter -- we're interested in distinguishing 
RV32 and RV64, because that's where the change in semantics comes from.


r~