Re: DOCS: include a sample "Makefile"?

[Anthony W. Youngman]

In message <address@hidden>, Jonathan Kulp
<address@hidden> writes
>Werner LEMBERG wrote:
>>> parts:
>>>     $(LILY_CMD) $(wildcard Parts/*.ly)
>>>     mv *.pdf $(OUTDIR)/
>>  `wildcard' is a GNU extension.  It can be circumvented with shell
>> commands, however, I suggest to name the part files explicitly.
>
>Pity.  In that case, the original approach is best for portability I suppose.
>Here's how I have the "parts" target now:
>
>parts:
>       for LILYFILE in Parts/*.ly ; do $(LILY_CMD) "$$LILYFILE" ; done
>       mv *.pdf $(OUTDIR)/
>
>It works exactly as it did with the GNU wildcard, except that multiple files
>can't be compiled at once with separate processors.  I'll probably stick
>with the GNU wildcard approach in my personal makefiles, or else have
>both lines in there with one commented out.

My bash-fu is minimal to non-existent, but couldn't you do something
like

        for LILYFILE in Parts/*.ly ; do $(LILY_CMD) "$$LILYFILE" & ;
done
        wait
        mv *.pdf $(OUTDIR)/

?

I'm sure there's a command, and I think it is "wait", that says to wait
and collect status from all the jobs you've just spawned, so the mv
wouldn't run until all the LILY_CMD commands had completed.

Cheers,
Wol
-- 
Anthony W. Youngman - address@hidden