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Re: [avr-gcc-list] r-engineering the JTAG-ICE protocol
From: |
Jesper Hansen |
Subject: |
Re: [avr-gcc-list] r-engineering the JTAG-ICE protocol |
Date: |
Sat, 5 Oct 2002 18:08:14 +0200 |
Hi Karl,
> Yep: buy it, r-engineer it, dump it.....:(
Yes, sad story.
Would have been so much easier if Atmel had published the protocol.
(But then we wouldn't have bought it in the first place, heee )
> JTAG port bitrate can be 50, 100, 200 kHz.
> We could use software polling or maybe a SPI port(s)...
Should be no problem. Thats at least 50-100 cycles per clock.
Just put TCK on an interrupt pin, and store the status on the other three
when an interrupt comes in, sleep and repeat.
> A first step probably would be to write a little prog. to dump the JTAG
> traffic to a host computer via RS232...
If you've done that, you're ready. No more should be needed.
Perhaps the data needs to be temporarily stored in the internal SRAM to
buffer it on long sequences.
/Jesper
avr-gcc-list at http://avr1.org
- Re: [avr-gcc-list] r-engineering the JTAG-ICE protocol, Karl Ran, 2002/10/07
- Re: [avr-gcc-list] r-engineering the JTAG-ICE protocol,
Jesper Hansen <=
- Re: [avr-gcc-list] r-engineering the JTAG-ICE protocol, Karl Ran, 2002/10/07
- Re: [avr-gcc-list] r-engineering the JTAG-ICE protocol, Karl Ran, 2002/10/07
- Re: [avr-gcc-list] r-engineering the JTAG-ICE protocol, Karl Ran, 2002/10/10
- Re: [avr-gcc-list] r-engineering the JTAG-ICE protocol, Karl Ran, 2002/10/10