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Re: SDR transceiver having independent mixer and ADC sampling clocks


From: Qasim Chaudhari
Subject: Re: SDR transceiver having independent mixer and ADC sampling clocks
Date: Tue, 25 Feb 2020 09:35:12 +0500

Hi
    "The target is to generate a physical clock signal having small jitter and
accurate phase. Hence, I need to control the frequency of some VCO based on
the information the receiver signal processing gives."

    You have the option to generate the clock entirely in digital domain because a voltage controlled clock exhibits a higher level of phase noise as com-
pared to a free running clock, and hence injects more timing jitter (variation
of the clock transitions around its mean value) into the system.



On Mon, Feb 24, 2020 at 10:02 PM <address@hidden> wrote:
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Today's Topics:

   1. SDR transceiver having independent mixer and ADC sampling
      clocks (Heikki Laamanen)
   2. Re: SDR transceiver having independent mixer and ADC sampling
      clocks (Brian Padalino)
   3. gr-fosphor on AMD RX 550 (Johannes Demel)


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Message: 1
Date: Mon, 24 Feb 2020 17:38:35 +0200
From: "Heikki Laamanen" <address@hidden>
To: <address@hidden>
Subject: SDR transceiver having independent mixer and ADC sampling
        clocks
Message-ID: <009801d5eb28$7a78e460$6f6aad20$@dlc.fi>
Content-Type: text/plain; charset="utf-8"

Hi experts in SDR RF transceivers,



I am working on a timing and synchronization system which generates a
high-precision timing signal from a terrestrial broadcast signal.  I am
looking for a suitable SDR HW-board providing independent clocks for the RF
mixers and the ADC.



It seems that many SDR boards use transceiver chips having mixer and ADC
clocks which are derived from a single clock. Thus, it is not feasible to
control the ADC sampling clock frequency without affecting the mixer
frequency. For example, some USRP products have Analog Devices AD9361
transceiver chips providing no option to have fully independent mixer and
ADC clocks.



Why would I like to have independent mixer and ADC sampling clock?



The target is to generate a physical clock signal having small jitter and
accurate phase. Hence, I need to control the frequency of some VCO based on
the information the receiver signal processing gives. The most
straightforward way to do this is to control the frequency of a VCO
wherefrom the ADC sampling clock is derived.



I would appreciate any suggestions about SDR HW-platforms having the
capability described above.



Regards,

Heikki



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Message: 2
Date: Mon, 24 Feb 2020 11:11:25 -0500
From: Brian Padalino <address@hidden>
To: Heikki Laamanen <address@hidden>
Cc: GNURadio Discussion List <address@hidden>
Subject: Re: SDR transceiver having independent mixer and ADC sampling
        clocks
Message-ID:
        <CAEXYVK4oPupGs39m=ANvSDeTpqzdpWHJ+h7U1FexyRT=address@hidden>
Content-Type: text/plain; charset="utf-8"

On Mon, Feb 24, 2020 at 10:39 AM Heikki Laamanen <address@hidden>
wrote:

> Hi experts in SDR RF transceivers,
>
>
>
> I am working on a timing and synchronization system which generates a
> high-precision timing signal from a terrestrial broadcast signal.  I am
> looking for a suitable SDR HW-board providing independent clocks for the RF
> mixers and the ADC.
>
>
>
> It seems that many SDR boards use transceiver chips having mixer and ADC
> clocks which are derived from a single clock. Thus, it is not feasible to
> control the ADC sampling clock frequency without affecting the mixer
> frequency. For example, some USRP products have Analog Devices AD9361
> transceiver chips providing no option to have fully independent mixer and
> ADC clocks.
>

Is this assertion true?  According to this document:


https://ez.analog.com/wide-band-rf-transceivers/design-support/w/documents/10064/ad936x-local-oscillator-lo

There exists 3 VCO's in the AD9361.  One for TX, one for RX, and one for
the baseband.  Why do you believe the clocks are not independent?  I agree
the sampling clock might not be able to achieve the resolution you want,
but I don't see why they are not fully independent already.


>
>
> Why would I like to have independent mixer and ADC sampling clock?
>
>
>
> The target is to generate a physical clock signal having small jitter and
> accurate phase. Hence, I need to control the frequency of some VCO based on
> the information the receiver signal processing gives. The most
> straightforward way to do this is to control the frequency of a VCO
> wherefrom the ADC sampling clock is derived.
>

You need to be more specific regarding your jitter and phase requirements.

Also remember that time is all completely relative.  Lastly, what does
accurate phase mean to you?

Brian
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Message: 3
Date: Mon, 24 Feb 2020 17:30:28 +0100
From: Johannes Demel <address@hidden>
To: "address@hidden" <address@hidden>
Subject: gr-fosphor on AMD RX 550
Message-ID: <address@hidden>
Content-Type: text/plain; charset=utf-8; format=flowed

Hi all,

We have some new AMD machines with RX 550 graphics. I want to run
gr-fosphor on them. So far I've failed to make it work.

It's an AMD system with RX 550 and Ubuntu 18.04 with amdgpu open source
drivers. I work with GR 3.8-master (or 3.9.0.0-git)
`4f53ac5a76e3ab05960a81905a570cd74d2708d7`

Since it was quite tricky for me to install OpenCL and make gr-fosphor
find it, I just document my workflow really quick.

I found this website:
https://einsteinathome.org/content/quick-guide-how-install-opencl-amd-gpus-linux-kubuntu-1804-and-similar-distro

First, I went to amd.com and got the drivers for my GPU:
https://www.amd.com/en/support/graphics/radeon-500-series/radeon-rx-500-series/radeon-rx-550

Then I ran:
./amdgpu-pro-install --opencl=legacy,pal
This does only install OpenCL

Further, I had to install these packages on Ubuntu:
libfreetype6-dev
ocl-icd-opencl-dev
libglfw3-dev

Also, `clinfo` was useful because it gives you some info about your system.

So finally, I could compile and install `gr-fosphor`. It appears in GRC
and I can plug the block (Qt version) in a flowgraph.

But if I run this flowgraph, I get the following error:
```
[!] gl_cmap shader compilation failed (cmap_simple.glsl)
[w] Color map shader 'simple' failed to load, will use fallback
[!] gl_cmap shader compile log :

[!] gl_cmap shader compilation failed (cmap_bicubic.glsl)
[w] Color map shader 'bicubic' failed to load, will use fallback
[!] gl_cmap shader compile log :

[!] gl_cmap shader compilation failed (cmap_fallback.glsl)
[!] Color map shader 'fallback' failed, aborting
gr::log :ERROR: qt_sink_c0 - Failed to initialize fosphor
```

I have no idea why and so far googling brought me to some macports
threads that were related to Intel GPUs on MacOS.

Did someone already succeed with gr-fosphor on this hardware? Do I have
suitable hardware? Did I fail the installation process somewhere? Do I
need to provide additional info?

Cheers
Johannes



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