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Re: can't compute prerequisites in static pattern rule

From: Noel Yap
Subject: Re: can't compute prerequisites in static pattern rule
Date: Tue, 16 Dec 2003 09:02:03 -0500

Evgeny Sologubov wrote:
> Hello,
> I am having a problem with such a rule:
> all: prj-Main
> prj-%: $(shell cat -s %/Makefile.dep)
>        $(MAKE) -C $*
> make (a win32 build of v3.80) says:
> /usr/bin/cat: %/Makefile.dep: No such file or directory
> :(
> I expected that it shall be expanded to the following:
> prj-Main: $(shell cat -s Main/Makefile.dep)
>        $(MAKE) -C $*

$(shell) gets executed during parsing of the makefile so % isn't interpreted as 
a matching character.

> Is there a way to do what I want?

Nothing obvious comes to mind.  My instinct is to say that this can't be done.  
You might have to rethink how you want to do what you really want to do.

For example, in the end, I think what you want is to generate a dependency file 
for a project.  The usual way to do this is to include that dependency file 
within the makefile.  This inclusion cannot be done generically, but this 
really shouldn't be a
problem since, presumably, you should know what project you're trying to build, 
anyway.  Is this not so?

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