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[PATCH v3 09/60] target/arm: Change CPUArchState.thumb to bool
From: |
Richard Henderson |
Subject: |
[PATCH v3 09/60] target/arm: Change CPUArchState.thumb to bool |
Date: |
Sun, 17 Apr 2022 10:43:35 -0700 |
Bool is a more appropriate type for this value.
Adjust the assignments to use true/false.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 2 +-
linux-user/arm/cpu_loop.c | 2 +-
target/arm/cpu.c | 2 +-
target/arm/m_helper.c | 6 +++---
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a61a52e2f6..4eb378ede2 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -259,6 +259,7 @@ typedef struct CPUArchState {
*/
uint32_t pstate;
bool aarch64; /* True if CPU is in aarch64 state; inverse of PSTATE.nRW */
+ bool thumb; /* True if CPU is in thumb mode; cpsr[5] */
/* Cached TBFLAGS state. See below for which bits are included. */
CPUARMTBFlags hflags;
@@ -285,7 +286,6 @@ typedef struct CPUArchState {
uint32_t ZF; /* Z set if zero. */
uint32_t QF; /* 0 or 1 */
uint32_t GE; /* cpsr[19:16] */
- uint32_t thumb; /* cpsr[5]. 0 = arm mode, 1 = thumb mode. */
uint32_t condexec_bits; /* IT bits. cpsr[15:10,26:25]. */
uint32_t btype; /* BTI branch type. spsr[11:10]. */
uint64_t daif; /* exception masks, in the bits they are in PSTATE */
diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index aae375d617..2979109f92 100644
--- a/linux-user/arm/cpu_loop.c
+++ b/linux-user/arm/cpu_loop.c
@@ -231,7 +231,7 @@ do_kernel_trap(CPUARMState *env)
/* Jump back to the caller. */
addr = env->regs[14];
if (addr & 1) {
- env->thumb = 1;
+ env->thumb = true;
addr &= ~1;
}
env->regs[15] = addr;
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 30e0d16ad4..561f180067 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -51,7 +51,7 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value)
if (is_a64(env)) {
env->pc = value;
- env->thumb = 0;
+ env->thumb = false;
} else {
env->regs[15] = value & ~1;
env->thumb = value & 1;
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index b7a0fe0114..a740c3e160 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -564,7 +564,7 @@ void HELPER(v7m_bxns)(CPUARMState *env, uint32_t dest)
env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK;
}
switch_v7m_security_state(env, dest & 1);
- env->thumb = 1;
+ env->thumb = true;
env->regs[15] = dest & ~1;
arm_rebuild_hflags(env);
}
@@ -590,7 +590,7 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest)
* except that the low bit doesn't indicate Thumb/not.
*/
env->regs[14] = nextinst;
- env->thumb = 1;
+ env->thumb = true;
env->regs[15] = dest & ~1;
return;
}
@@ -626,7 +626,7 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest)
}
env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK;
switch_v7m_security_state(env, 0);
- env->thumb = 1;
+ env->thumb = true;
env->regs[15] = dest;
arm_rebuild_hflags(env);
}
--
2.25.1
- [PATCH v3 05/60] target/arm: Change DisasContext.aarch64 to bool, (continued)
- [PATCH v3 09/60] target/arm: Change CPUArchState.thumb to bool,
Richard Henderson <=
- [PATCH v3 19/60] target/arm: Use tcg_constant in translate-neon.c, Richard Henderson, 2022/04/17
- [PATCH v3 16/60] target/arm: Simplify aa32 DISAS_WFI, Richard Henderson, 2022/04/17
- [PATCH v3 15/60] target/arm: Simplify gen_sar, Richard Henderson, 2022/04/17
- [PATCH v3 07/60] target/arm: Extend store_cpu_offset to take field size, Richard Henderson, 2022/04/17