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Re: [PATCH v3 03/60] target/arm: Update SCR_EL3 bits to ARMv8.8
From: |
Alex Bennée |
Subject: |
Re: [PATCH v3 03/60] target/arm: Update SCR_EL3 bits to ARMv8.8 |
Date: |
Tue, 19 Apr 2022 12:14:35 +0100 |
User-agent: |
mu4e 1.7.13; emacs 28.1.50 |
Richard Henderson <richard.henderson@linaro.org> writes:
> Update SCR_EL3 fields per ARM DDI0487 H.a.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Aside: I notice you have added FEAT_foo comments to the SCTLR bits next,
it might be worth at least flagging the FEAT_RME ones here.
> ---
> target/arm/cpu.h | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 9a29a4a215..f843c62c83 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -1544,6 +1544,18 @@ static inline void xpsr_write(CPUARMState *env,
> uint32_t val, uint32_t mask)
> #define SCR_FIEN (1U << 21)
> #define SCR_ENSCXT (1U << 25)
> #define SCR_ATA (1U << 26)
> +#define SCR_FGTEN (1U << 27)
> +#define SCR_ECVEN (1U << 28)
> +#define SCR_TWEDEN (1U << 29)
> +#define SCR_TWEDEL MAKE_64BIT_MASK(30, 4)
> +#define SCR_TME (1ULL << 34)
> +#define SCR_AMVOFFEN (1ULL << 35)
> +#define SCR_ENAS0 (1ULL << 36)
> +#define SCR_ADEN (1ULL << 37)
> +#define SCR_HXEN (1ULL << 38)
> +#define SCR_TRNDR (1ULL << 40)
> +#define SCR_ENTP2 (1ULL << 41)
> +#define SCR_GPF (1ULL << 48)
>
> #define HSTR_TTEE (1 << 16)
> #define HSTR_TJDBX (1 << 17)
--
Alex Bennée
- [PATCH v3 00/60] target/arm: Cleanups, new features, new cpus, Richard Henderson, 2022/04/17
- [PATCH v3 02/60] target/arm: Update ISAR fields for ARMv8.8, Richard Henderson, 2022/04/17
- [PATCH v3 03/60] target/arm: Update SCR_EL3 bits to ARMv8.8, Richard Henderson, 2022/04/17
- [PATCH v3 01/60] tcg: Add tcg_constant_ptr, Richard Henderson, 2022/04/17
- [PATCH v3 04/60] target/arm: Update SCTLR bits to ARMv9.2, Richard Henderson, 2022/04/17
- [PATCH v3 06/60] target/arm: Change CPUArchState.aarch64 to bool, Richard Henderson, 2022/04/17
- Re:, Alex Bennée, 2022/04/19
- [PATCH v3 05/60] target/arm: Change DisasContext.aarch64 to bool, Richard Henderson, 2022/04/17
- [PATCH v3 18/60] target/arm: Use tcg_constant in translate-m-nocp.c, Richard Henderson, 2022/04/17