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Re: [Qemu-devel] [PATCH 4/4] tcg-hppa: Compute is_write in cpu_signal_ha


From: Stuart Brady
Subject: Re: [Qemu-devel] [PATCH 4/4] tcg-hppa: Compute is_write in cpu_signal_handler.
Date: Wed, 17 Mar 2010 02:10:43 +0000
User-agent: Mutt/1.5.20 (2009-06-14)

On Fri, Mar 12, 2010 at 03:58:08PM +0100, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <address@hidden>

Acked-by: Stuart Brady <address@hidden>

Argh.  It just seems mind bogglingly silly that is_write doesn't seem to
be included in the siginfo on archs where doing so would make sense...

It's at least something I'd have hoped libc could take care of in the case
where the hardware doesn't indicate whether the fault was due to a read
or a write...

(Right up there with the use of our own caching flushing code instead of
calls to mprotect(), etc. and the rather dubious use of qemu-lock.h...)

> ---
>  cpu-exec.c |   38 +++++++++++++++++++++++++++++++-------
>  1 files changed, 31 insertions(+), 7 deletions(-)
> 
> diff --git a/cpu-exec.c b/cpu-exec.c
> index bcfcda2..14204f4 100644
> --- a/cpu-exec.c
> +++ b/cpu-exec.c
> @@ -1193,15 +1193,39 @@ int cpu_signal_handler(int host_signum, void *pinfo,
>  {
>      struct siginfo *info = pinfo;
>      struct ucontext *uc = puc;
> -    unsigned long pc;
> -    int is_write;
> +    unsigned long pc = uc->uc_mcontext.sc_iaoq[0];
> +    uint32_t insn = *(uint32_t *)pc;
> +    int is_write = 0;
> +
> +    /* XXX: need kernel patch to get write flag faster.  */
> +    switch (insn >> 26) {
> +    case 0x1a: /* STW */
> +    case 0x19: /* STH */
> +    case 0x18: /* STB */
> +    case 0x1b: /* STWM */
> +        is_write = 1;
> +        break;
> +
> +    case 0x09: /* CSTWX, FSTWX, FSTWS */
> +    case 0x0b: /* CSTDX, FSTDX, FSTDS */
> +        /* Distinguish from coprocessor load ... */
> +        is_write = (insn >> 9) & 1;
> +        break;
> +
> +    case 0x03:
> +        switch ((insn >> 6) & 15) {
> +        case 0xa: /* STWS */
> +        case 0x9: /* STHS */
> +        case 0x8: /* STBS */
> +        case 0xe: /* STWAS */
> +        case 0xc: /* STBYS */
> +            is_write = 1;
> +        }
> +        break;
> +    }
>  
> -    pc = uc->uc_mcontext.sc_iaoq[0];
> -    /* FIXME: compute is_write */
> -    is_write = 0;
>      return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
> -                             is_write,
> -                             &uc->uc_sigmask, puc);
> +                             is_write, &uc->uc_sigmask, puc);
>  }
>  
>  #else
> -- 
> 1.6.6.1
> 
> 




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