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[Qemu-devel] [PULL 15/21] linux-user/arm: Correct TARGET_NR_timerfd to T
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 15/21] linux-user/arm: Correct TARGET_NR_timerfd to TARGET_NR_timerfd_create |
Date: |
Mon, 18 May 2015 20:15:15 +0100 |
From: Timothy Baldwin <address@hidden>
Misspelled system call name in macro was causing timerfd_create not
to be supported for the ARM target.
Signed-off-by: Timothy Edward Baldwin <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
linux-user/arm/syscall_nr.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/arm/syscall_nr.h b/linux-user/arm/syscall_nr.h
index 7d7be7c..53552be 100644
--- a/linux-user/arm/syscall_nr.h
+++ b/linux-user/arm/syscall_nr.h
@@ -354,7 +354,7 @@
#define TARGET_NR_kexec_load (347)
#define TARGET_NR_utimensat (348)
#define TARGET_NR_signalfd (349)
-#define TARGET_NR_timerfd (350)
+#define TARGET_NR_timerfd_create (350)
#define TARGET_NR_eventfd (351)
#define TARGET_NR_fallocate (352)
#define TARGET_NR_timerfd_settime (353)
--
1.9.1
- [Qemu-devel] [PULL 00/21] target-arm queue, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 02/21] target-arm: cpu64: Add support for Cortex-A53, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 21/21] target-arm: Remove unneeded '+', Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 19/21] target-arm: Correct accessfn for CNTP_{CT}VAL_EL0, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 18/21] target-arm: Add WFx syndrome function, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 17/21] target-arm: Add EL3 and EL2 TCR checking, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 15/21] linux-user/arm: Correct TARGET_NR_timerfd to TARGET_NR_timerfd_create,
Peter Maydell <=
- [Qemu-devel] [PULL 20/21] target-arm: Correct accessfn for CNTV_TVAL_EL0, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 14/21] arm: xlnx-ep108: Add bootloading, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 12/21] arm: Add xlnx-ep108 machine, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 11/21] arm: xlnx-zynqmp: Add UART support, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 10/21] char: cadence_uart: Split state struct and type into header, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 16/21] target-arm: Add TTBR regime function and use, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 09/21] char: cadence_uart: Clean up variable names, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 13/21] arm: xlnx-ep108: Add external RAM, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 08/21] arm: xlnx-zynqmp: Add GEM support, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 04/21] arm: xlnx-zynqmp: Add GIC, Peter Maydell, 2015/05/18