[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 16/20] tcg: Add TCG_MAX_INSNS
|
From: |
Richard Henderson |
|
Subject: |
[Qemu-devel] [PATCH 16/20] tcg: Add TCG_MAX_INSNS |
|
Date: |
Tue, 1 Sep 2015 22:51:59 -0700 |
Adjust all translators to respect it.
Signed-off-by: Richard Henderson <address@hidden>
---
target-alpha/translate.c | 3 +++
target-arm/translate-a64.c | 3 +++
target-arm/translate.c | 6 +++++-
target-cris/translate.c | 3 +++
target-i386/translate.c | 6 +++++-
target-lm32/translate.c | 3 +++
target-m68k/translate.c | 6 +++++-
target-microblaze/translate.c | 6 +++++-
target-mips/translate.c | 7 ++++++-
target-moxie/translate.c | 13 +++++++++++--
target-openrisc/translate.c | 3 +++
target-ppc/translate.c | 6 +++++-
target-s390x/translate.c | 3 +++
target-sh4/translate.c | 7 ++++++-
target-sparc/translate.c | 7 ++++++-
target-tricore/translate.c | 17 ++++++++++-------
target-unicore32/translate.c | 3 +++
target-xtensa/translate.c | 3 +++
tcg/tcg.h | 1 +
19 files changed, 89 insertions(+), 17 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 0c43ffa..0229a03 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2899,6 +2899,9 @@ static inline void
gen_intermediate_code_internal(AlphaCPU *cpu,
if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
}
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
if (in_superpage(&ctx, pc_start)) {
pc_mask = (1ULL << 41) - 1;
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 4fb4a9f..10173a4 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -10991,6 +10991,9 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
}
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
diff --git a/target-arm/translate.c b/target-arm/translate.c
index c9de455..b4c5dd9 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -11223,8 +11223,12 @@ static inline void
gen_intermediate_code_internal(ARMCPU *cpu,
lj = -1;
num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;
- if (max_insns == 0)
+ if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
+ }
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 3c8fac4..716d961 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3185,6 +3185,9 @@ gen_intermediate_code_internal(CRISCPU *cpu,
TranslationBlock *tb,
if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
}
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
do {
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 4497c13..e272409 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7993,8 +7993,12 @@ static inline void gen_intermediate_code_internal(X86CPU
*cpu,
lj = -1;
num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;
- if (max_insns == 0)
+ if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
+ }
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
for(;;) {
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 84eeac3..67fdb09 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1085,6 +1085,9 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
}
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
do {
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index bfd9c00..9ac2cea 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2992,8 +2992,12 @@ gen_intermediate_code_internal(M68kCPU *cpu,
TranslationBlock *tb,
lj = -1;
num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;
- if (max_insns == 0)
+ if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
+ }
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
do {
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 9e046f7..d4ec25c 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1704,8 +1704,12 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu,
TranslationBlock *tb,
lj = -1;
num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;
- if (max_insns == 0)
+ if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
+ }
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
do
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 320adef..a1e6b68 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -20199,8 +20199,13 @@ gen_intermediate_code_internal(MIPSCPU *cpu,
TranslationBlock *tb,
MO_UNALN : MO_ALIGN;
num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;
- if (max_insns == 0)
+ if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
+ }
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
+
LOG_DISAS("\ntb %p idx %d hflags %04x\n", tb, ctx.mem_idx, ctx.hflags);
gen_tb_start(tb);
while (ctx.bstate == BS_NONE) {
diff --git a/target-moxie/translate.c b/target-moxie/translate.c
index cfc3cec..8741bba 100644
--- a/target-moxie/translate.c
+++ b/target-moxie/translate.c
@@ -826,7 +826,7 @@ gen_intermediate_code_internal(MoxieCPU *cpu,
TranslationBlock *tb,
CPUBreakpoint *bp;
int j, lj = -1;
CPUMoxieState *env = &cpu->env;
- int num_insns;
+ int num_insns, max_insns;
pc_start = tb->pc;
ctx.pc = pc_start;
@@ -836,6 +836,13 @@ gen_intermediate_code_internal(MoxieCPU *cpu,
TranslationBlock *tb,
ctx.singlestep_enabled = 0;
ctx.bstate = BS_NONE;
num_insns = 0;
+ max_insns = tb->cflags & CF_COUNT_MASK;
+ if (max_insns == 0) {
+ max_insns = CF_COUNT_MASK;
+ }
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
do {
@@ -868,10 +875,12 @@ gen_intermediate_code_internal(MoxieCPU *cpu,
TranslationBlock *tb,
ctx.pc += decode_opc(cpu, &ctx);
num_insns++;
+ if (num_insns >= max_insns) {
+ break;
+ }
if (cs->singlestep_enabled) {
break;
}
-
if ((ctx.pc & (TARGET_PAGE_SIZE - 1)) == 0) {
break;
}
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index d5da295..002c9a4 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -1670,6 +1670,9 @@ static inline void
gen_intermediate_code_internal(OpenRISCCPU *cpu,
if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
}
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 2872c77..f576ecb 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11469,8 +11469,12 @@ static inline void
gen_intermediate_code_internal(PowerPCCPU *cpu,
#endif
num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;
- if (max_insns == 0)
+ if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
+ }
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
tcg_clear_temp_count();
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index d62e4a3..4518571 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -5353,6 +5353,9 @@ static inline void gen_intermediate_code_internal(S390CPU
*cpu,
if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
}
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
gen_tb_start(tb);
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 740bf66..ac77ab2 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1869,8 +1869,13 @@ gen_intermediate_code_internal(SuperHCPU *cpu,
TranslationBlock *tb,
ii = -1;
num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;
- if (max_insns == 0)
+ if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
+ }
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
+
gen_tb_start(tb);
while (ctx.bstate == BS_NONE && !tcg_op_buf_full()) {
if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 8f7bfb5..4e3760b 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5237,8 +5237,13 @@ static inline void
gen_intermediate_code_internal(SPARCCPU *cpu,
num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;
- if (max_insns == 0)
+ if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
+ }
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
+
gen_tb_start(tb);
do {
if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index a5e4ddb..8173055 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -8274,13 +8274,21 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct
TranslationBlock *tb,
CPUTriCoreState *env = &cpu->env;
DisasContext ctx;
target_ulong pc_start;
- int num_insns;
+ int num_insns, max_insns;
if (search_pc) {
qemu_log("search pc %d\n", search_pc);
}
num_insns = 0;
+ max_insns = tb->cflags & CF_COUNT_MASK;
+ if (max_insns == 0) {
+ max_insns = CF_COUNT_MASK;
+ }
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
+
pc_start = tb->pc;
ctx.pc = pc_start;
ctx.saved_pc = -1;
@@ -8299,12 +8307,7 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct
TranslationBlock *tb,
num_insns++;
- if (tcg_op_buf_full()) {
- gen_save_pc(ctx.next_pc);
- tcg_gen_exit_tb(0);
- break;
- }
- if (singlestep) {
+ if (num_insns >= max_insns || singlestep || tcg_op_buf_full()) {
gen_save_pc(ctx.next_pc);
tcg_gen_exit_tb(0);
break;
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index 28db34a..b701c51 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -1901,6 +1901,9 @@ static inline void
gen_intermediate_code_internal(UniCore32CPU *cpu,
if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
}
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
#ifndef CONFIG_USER_ONLY
if ((env->uncached_asr & ASR_M) == ASR_MODE_USER) {
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index ab9e8f9..c7151bb 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -3030,6 +3030,9 @@ void gen_intermediate_code_internal(XtensaCPU *cpu,
if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
}
+ if (max_insns > TCG_MAX_INSNS) {
+ max_insns = TCG_MAX_INSNS;
+ }
dc.config = env->config;
dc.singlestep_enabled = cs->singlestep_enabled;
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 455c229..8e67e41 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -194,6 +194,7 @@ typedef struct TCGPool {
#define TCG_POOL_CHUNK_SIZE 32768
#define TCG_MAX_TEMPS 512
+#define TCG_MAX_INSNS 512
/* when the size of the arguments of a called function is smaller than
this value, they are statically allocated in the TB stack frame */
--
2.4.3
- [Qemu-devel] [PATCH 06/20] target-mips: Add delayed branch state to insn_start, (continued)
- [Qemu-devel] [PATCH 06/20] target-mips: Add delayed branch state to insn_start, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 07/20] target-s390x: Add cc_op state to insn_start, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 08/20] target-sh4: Add flags state to insn_start, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 09/20] target-cris: Mirror gen_opc_pc into insn_start, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 11/20] target-sparc: Split out gen_branch_n, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 10/20] target-sparc: Tidy gen_branch_a interface, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 12/20] target-sparc: Remove gen_opc_jump_pc, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 13/20] target-sparc: Add npc state to insn_start, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 14/20] tcg: Merge cpu_gen_code into tb_gen_code, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 15/20] target-*: Drop cpu_gen_code define, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 16/20] tcg: Add TCG_MAX_INSNS,
Richard Henderson <=
- [Qemu-devel] [PATCH 18/20] tcg: Save insn data and use it in cpu_restore_state_from_tb, Richard Henderson, 2015/09/02
- Re: [Qemu-devel] [PATCH 18/20] tcg: Save insn data and use it in cpu_restore_state_from_tb, Richard Henderson, 2015/09/15
[Qemu-devel] [PATCH 20/20] tcg: Remove tcg_gen_code_search_pc, Richard Henderson, 2015/09/02
[Qemu-devel] [PATCH 17/20] tcg: Pass data argument to restore_state_to_opc, Richard Henderson, 2015/09/02