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[Qemu-devel] [PATCH 17/20] tcg: Pass data argument to restore_state_to_o
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From: |
Richard Henderson |
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Subject: |
[Qemu-devel] [PATCH 17/20] tcg: Pass data argument to restore_state_to_opc |
|
Date: |
Tue, 1 Sep 2015 22:52:00 -0700 |
The gen_opc_* arrays are already redundant with the data stored in
the insn_start arguments. Transition restore_state_to_opc to use
data from the later.
Signed-off-by: Richard Henderson <address@hidden>
---
include/exec/exec-all.h | 2 +-
target-alpha/translate.c | 5 +++--
target-arm/translate.c | 9 +++++----
target-cris/translate.c | 5 +++--
target-i386/translate.c | 26 ++++++--------------------
target-lm32/translate.c | 5 +++--
target-m68k/translate.c | 5 +++--
target-microblaze/translate.c | 5 +++--
target-mips/translate.c | 9 +++++----
target-moxie/translate.c | 5 +++--
target-openrisc/translate.c | 4 ++--
target-ppc/translate.c | 5 +++--
target-s390x/translate.c | 8 ++++----
target-sh4/translate.c | 7 ++++---
target-sparc/translate.c | 9 +++++----
target-tricore/translate.c | 5 +++--
target-unicore32/translate.c | 5 +++--
target-xtensa/translate.c | 5 +++--
tcg/tcg.c | 12 ++++++++++--
tcg/tcg.h | 2 ++
translate-all.c | 2 +-
21 files changed, 75 insertions(+), 65 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 070291e..8c347ba 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -75,7 +75,7 @@ typedef struct TranslationBlock TranslationBlock;
void gen_intermediate_code(CPUArchState *env, struct TranslationBlock *tb);
void gen_intermediate_code_pc(CPUArchState *env, struct TranslationBlock *tb);
void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb,
- int pc_pos);
+ target_ulong *data);
void cpu_gen_init(void);
bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 0229a03..27c9942 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -3023,7 +3023,8 @@ void gen_intermediate_code_pc (CPUAlphaState *env, struct
TranslationBlock *tb)
gen_intermediate_code_internal(alpha_env_get_cpu(env), tb, true);
}
-void restore_state_to_opc(CPUAlphaState *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUAlphaState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->pc = tcg_ctx.gen_opc_pc[pc_pos];
+ env->pc = data[0];
}
diff --git a/target-arm/translate.c b/target-arm/translate.c
index b4c5dd9..2940d07 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -11574,13 +11574,14 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f,
fprintf_function cpu_fprintf,
}
}
-void restore_state_to_opc(CPUARMState *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUARMState *env, TranslationBlock *tb,
+ target_ulong *data)
{
if (is_a64(env)) {
- env->pc = tcg_ctx.gen_opc_pc[pc_pos];
+ env->pc = data[0];
env->condexec_bits = 0;
} else {
- env->regs[15] = tcg_ctx.gen_opc_pc[pc_pos];
- env->condexec_bits = gen_opc_condexec_bits[pc_pos];
+ env->regs[15] = data[0];
+ env->condexec_bits = data[1];
}
}
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 716d961..ce2d3a0 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3457,7 +3457,8 @@ void cris_initialize_tcg(void)
}
}
-void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->pc = tcg_ctx.gen_opc_pc[pc_pos];
+ env->pc = data[0];
}
diff --git a/target-i386/translate.c b/target-i386/translate.c
index e272409..49944df 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8117,26 +8117,12 @@ void gen_intermediate_code_pc(CPUX86State *env,
TranslationBlock *tb)
gen_intermediate_code_internal(x86_env_get_cpu(env), tb, true);
}
-void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb,
+ target_ulong *data)
{
- int cc_op;
-#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_OP)) {
- int i;
- qemu_log("RESTORE:\n");
- for(i = 0;i <= pc_pos; i++) {
- if (tcg_ctx.gen_opc_instr_start[i]) {
- qemu_log("0x%04x: " TARGET_FMT_lx "\n", i,
- tcg_ctx.gen_opc_pc[i]);
- }
- }
- qemu_log("pc_pos=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
- pc_pos, tcg_ctx.gen_opc_pc[pc_pos] - tb->cs_base,
- (uint32_t)tb->cs_base);
- }
-#endif
- env->eip = tcg_ctx.gen_opc_pc[pc_pos] - tb->cs_base;
- cc_op = gen_opc_cc_op[pc_pos];
- if (cc_op != CC_OP_DYNAMIC)
+ int cc_op = data[1];
+ env->eip = data[0] - tb->cs_base;
+ if (cc_op != CC_OP_DYNAMIC) {
env->cc_op = cc_op;
+ }
}
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 67fdb09..d0aaea2 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1219,9 +1219,10 @@ void lm32_cpu_dump_state(CPUState *cs, FILE *f,
fprintf_function cpu_fprintf,
cpu_fprintf(f, "\n\n");
}
-void restore_state_to_opc(CPULM32State *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPULM32State *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->pc = tcg_ctx.gen_opc_pc[pc_pos];
+ env->pc = data[0];
}
void lm32_translate_init(void)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 9ac2cea..2fc9b68 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -3124,7 +3124,8 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f,
fprintf_function cpu_fprintf,
cpu_fprintf (f, "FPRESULT = %12g\n", *(double *)&env->fp_result);
}
-void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->pc = tcg_ctx.gen_opc_pc[pc_pos];
+ env->pc = data[0];
}
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index d4ec25c..57c79a6 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1952,7 +1952,8 @@ void mb_tcg_init(void)
}
}
-void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->sregs[SR_PC] = tcg_ctx.gen_opc_pc[pc_pos];
+ env->sregs[SR_PC] = data[0];
}
diff --git a/target-mips/translate.c b/target-mips/translate.c
index a1e6b68..ad9e5d2 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -20717,18 +20717,19 @@ void cpu_state_reset(CPUMIPSState *env)
}
}
-void restore_state_to_opc(CPUMIPSState *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUMIPSState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->active_tc.PC = tcg_ctx.gen_opc_pc[pc_pos];
+ env->active_tc.PC = data[0];
env->hflags &= ~MIPS_HFLAG_BMASK;
- env->hflags |= gen_opc_hflags[pc_pos];
+ env->hflags |= data[1];
switch (env->hflags & MIPS_HFLAG_BMASK_BASE) {
case MIPS_HFLAG_BR:
break;
case MIPS_HFLAG_BC:
case MIPS_HFLAG_BL:
case MIPS_HFLAG_B:
- env->btarget = gen_opc_btarget[pc_pos];
+ env->btarget = data[2];
break;
}
}
diff --git a/target-moxie/translate.c b/target-moxie/translate.c
index 8741bba..9fa8a43 100644
--- a/target-moxie/translate.c
+++ b/target-moxie/translate.c
@@ -928,7 +928,8 @@ void gen_intermediate_code_pc(CPUMoxieState *env, struct
TranslationBlock *tb)
gen_intermediate_code_internal(moxie_env_get_cpu(env), tb, true);
}
-void restore_state_to_opc(CPUMoxieState *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUMoxieState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->pc = tcg_ctx.gen_opc_pc[pc_pos];
+ env->pc = data[0];
}
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 002c9a4..78c157b 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -1804,7 +1804,7 @@ void openrisc_cpu_dump_state(CPUState *cs, FILE *f,
}
void restore_state_to_opc(CPUOpenRISCState *env, TranslationBlock *tb,
- int pc_pos)
+ target_ulong *data)
{
- env->pc = tcg_ctx.gen_opc_pc[pc_pos];
+ env->pc = data[0];
}
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index f576ecb..1cfc1ea 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11626,7 +11626,8 @@ void gen_intermediate_code_pc (CPUPPCState *env, struct
TranslationBlock *tb)
gen_intermediate_code_internal(ppc_env_get_cpu(env), tb, true);
}
-void restore_state_to_opc(CPUPPCState *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUPPCState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->nip = tcg_ctx.gen_opc_pc[pc_pos];
+ env->nip = data[0];
}
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 4518571..047685c 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -5463,11 +5463,11 @@ void gen_intermediate_code_pc (CPUS390XState *env,
struct TranslationBlock *tb)
gen_intermediate_code_internal(s390_env_get_cpu(env), tb, true);
}
-void restore_state_to_opc(CPUS390XState *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUS390XState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- int cc_op;
- env->psw.addr = tcg_ctx.gen_opc_pc[pc_pos];
- cc_op = gen_opc_cc_op[pc_pos];
+ int cc_op = data[1];
+ env->psw.addr = data[0];
if ((cc_op != CC_OP_DYNAMIC) && (cc_op != CC_OP_STATIC)) {
env->cc_op = cc_op;
}
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index ac77ab2..db41d0b 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1978,8 +1978,9 @@ void gen_intermediate_code_pc(CPUSH4State * env, struct
TranslationBlock *tb)
gen_intermediate_code_internal(sh_env_get_cpu(env), tb, true);
}
-void restore_state_to_opc(CPUSH4State *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUSH4State *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->pc = tcg_ctx.gen_opc_pc[pc_pos];
- env->flags = gen_opc_hflags[pc_pos];
+ env->pc = data[0];
+ env->flags = data[1];
}
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 4e3760b..a208a6b 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5453,12 +5453,13 @@ void gen_intermediate_code_init(CPUSPARCState *env)
}
}
-void restore_state_to_opc(CPUSPARCState *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPUSPARCState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- target_ulong pc, npc;
+ target_ulong pc = data[0];
+ target_ulong npc = data[1];
- env->pc = pc = tcg_ctx.gen_opc_pc[pc_pos];
- npc = gen_opc_npc[pc_pos];
+ env->pc = pc;
if (npc == DYNAMIC_PC) {
/* already stored */
} else if (npc & JUMP_PC) {
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 8173055..a23bfcd 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -8348,9 +8348,10 @@ gen_intermediate_code_pc(CPUTriCoreState *env, struct
TranslationBlock *tb)
}
void
-restore_state_to_opc(CPUTriCoreState *env, TranslationBlock *tb, int pc_pos)
+restore_state_to_opc(CPUTriCoreState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->PC = tcg_ctx.gen_opc_pc[pc_pos];
+ env->PC = data[0];
}
/*
*
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index b701c51..75c7d65 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -2133,7 +2133,8 @@ void uc32_cpu_dump_state(CPUState *cs, FILE *f,
cpu_dump_state_ucf64(env, f, cpu_fprintf, flags);
}
-void restore_state_to_opc(CPUUniCore32State *env, TranslationBlock *tb, int
pc_pos)
+void restore_state_to_opc(CPUUniCore32State *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->regs[31] = tcg_ctx.gen_opc_pc[pc_pos];
+ env->regs[31] = data[0];
}
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index c7151bb..5df3913 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -3213,7 +3213,8 @@ void xtensa_cpu_dump_state(CPUState *cs, FILE *f,
}
}
-void restore_state_to_opc(CPUXtensaState *env, TranslationBlock *tb, int
pc_pos)
+void restore_state_to_opc(CPUXtensaState *env, TranslationBlock *tb,
+ target_ulong *data)
{
- env->pc = tcg_ctx.gen_opc_pc[pc_pos];
+ env->pc = data[0];
}
diff --git a/tcg/tcg.c b/tcg/tcg.c
index a44b834..d956f0b 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1007,7 +1007,6 @@ void tcg_dump_ops(TCGContext *s)
a = args[i];
#endif
qemu_log(" " TARGET_FMT_lx, a);
-
}
} else if (c == INDEX_op_call) {
/* variable number of arguments */
@@ -2301,7 +2300,7 @@ static inline int tcg_gen_code_common(TCGContext *s,
tcg_insn_unit *gen_code_buf,
long search_pc)
{
- int oi, oi_next;
+ int i, oi, oi_next;
#ifdef DEBUG_DISAS
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
@@ -2368,6 +2367,15 @@ static inline int tcg_gen_code_common(TCGContext *s,
tcg_reg_alloc_movi(s, args, dead_args, sync_args);
break;
case INDEX_op_insn_start:
+ for (i = 0; i < TARGET_INSN_START_WORDS; ++i) {
+ target_ulong a;
+#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
+ a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2];
+#else
+ a = args[i];
+#endif
+ s->gen_opc_data[i] = a;
+ }
break;
case INDEX_op_discard:
temp_dead(s, args[0]);
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 8e67e41..794b757 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -580,6 +580,8 @@ struct TCGContext {
target_ulong gen_opc_pc[OPC_BUF_SIZE];
uint16_t gen_opc_icount[OPC_BUF_SIZE];
uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
+
+ target_ulong gen_opc_data[TARGET_INSN_START_WORDS];
};
extern TCGContext tcg_ctx;
diff --git a/translate-all.c b/translate-all.c
index a5f7e78..74be98a 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -189,7 +189,7 @@ static int cpu_restore_state_from_tb(CPUState *cpu,
TranslationBlock *tb,
}
cpu->icount_decr.u16.low -= s->gen_opc_icount[j];
- restore_state_to_opc(env, tb, j);
+ restore_state_to_opc(env, tb, s->gen_opc_data);
#ifdef CONFIG_PROFILER
s->restore_time += profile_getclock() - ti;
--
2.4.3
- [Qemu-devel] [PATCH 14/20] tcg: Merge cpu_gen_code into tb_gen_code, (continued)
- [Qemu-devel] [PATCH 14/20] tcg: Merge cpu_gen_code into tb_gen_code, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 15/20] target-*: Drop cpu_gen_code define, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 16/20] tcg: Add TCG_MAX_INSNS, Richard Henderson, 2015/09/02
- [Qemu-devel] [PATCH 18/20] tcg: Save insn data and use it in cpu_restore_state_from_tb, Richard Henderson, 2015/09/02
- Re: [Qemu-devel] [PATCH 18/20] tcg: Save insn data and use it in cpu_restore_state_from_tb, Richard Henderson, 2015/09/15
[Qemu-devel] [PATCH 20/20] tcg: Remove tcg_gen_code_search_pc, Richard Henderson, 2015/09/02
[Qemu-devel] [PATCH 17/20] tcg: Pass data argument to restore_state_to_opc,
Richard Henderson <=
[Qemu-devel] [PATCH 19/20] tcg: Remove gen_intermediate_code_pc, Richard Henderson, 2015/09/02
Re: [Qemu-devel] [RFC 00/20] Do away with TB retranslation, Max Filippov, 2015/09/02