Three unrelated patches and Pranith's memory barrier patch sets.
The alignment patch is in support of Sparc's ldf instructions:
8 and 16-byte memory operations that require only 4-byte alignment.
It's just as easy to support this kind of misalignment as any other.
As mentioned in the commit, we'd also forgotten to properly handle
arm32, mips, ia64 and sparc when it came to overalignment.
I have a follow up patch set to make use of this for target-sparc.
I've tweaked the memory barrier patch set. For aarch64, ppc
and sparc, I've fixed the insn selection a bit. I merged the
optimization pass into the current optimization pass.