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Re: [Qemu-devel] [PULL v2 00/18] tcg queued patches


From: Pranith Kumar
Subject: Re: [Qemu-devel] [PULL v2 00/18] tcg queued patches
Date: Thu, 8 Sep 2016 19:49:41 -0400

On Thu, Sep 8, 2016 at 4:38 PM, Richard Henderson <address@hidden> wrote:
> On 09/08/2016 10:15 AM, Richard Henderson wrote:
>>
>> Three unrelated patches and Pranith's memory barrier patch sets.
>>
>> The alignment patch is in support of Sparc's ldf instructions:
>> 8 and 16-byte memory operations that require only 4-byte alignment.
>> It's just as easy to support this kind of misalignment as any other.
>> As mentioned in the commit, we'd also forgotten to properly handle
>> arm32, mips, ia64 and sparc when it came to overalignment.
>>
>> I have a follow up patch set to make use of this for target-sparc.
>>
>> I've tweaked the memory barrier patch set.  For aarch64, ppc
>> and sparc, I've fixed the insn selection a bit.  I merged the
>> optimization pass into the current optimization pass.
>
>
> Ho hum.  I think I've mucked something up here too.
> Please ignore this pull.
>

I think I found the error. It looks like the fence optimization patch
is causing the error.

I will reply in that patch.

--
Pranith



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