[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 06/29] target-sparc: simplify replace_tlb_entry by u
From: |
Artyom Tarasenko |
Subject: |
[Qemu-devel] [PATCH 06/29] target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE |
Date: |
Sat, 1 Oct 2016 12:05:10 +0200 |
Signed-off-by: Artyom Tarasenko <address@hidden>
---
target-sparc/ldst_helper.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 74708f2..7607128 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -127,9 +127,8 @@ static void replace_tlb_entry(SparcTLBEntry *tlb,
if (TTE_IS_VALID(tlb->tte)) {
CPUState *cs = CPU(sparc_env_get_cpu(env1));
- mask = 0xffffffffffffe000ULL;
- mask <<= 3 * ((tlb->tte >> 61) & 3);
- size = ~mask + 1;
+ size = 8192ULL << 3 * TTE_PGSIZE(tlb->tte);
+ mask = 1ULL + ~size;
va = tlb->tag & mask;
--
2.7.2
- Re: [Qemu-devel] [PATCH 02/29] target-sparc: use explicit mmu register pointers, (continued)
- [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Artyom Tarasenko, 2016/10/01
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Richard Henderson, 2016/10/10
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Artyom Tarasenko, 2016/10/10
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Richard Henderson, 2016/10/11
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Artyom Tarasenko, 2016/10/11
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Richard Henderson, 2016/10/11
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Artyom Tarasenko, 2016/10/12
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Richard Henderson, 2016/10/12
[Qemu-devel] [PATCH 04/29] target-sparc: add UltraSPARC T1 TLB #defines, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 06/29] target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE,
Artyom Tarasenko <=
[Qemu-devel] [PATCH 05/29] target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 08/29] target-sparc: implement UltraSPARC-T1 Strand status ASR, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 07/29] target-sparc: implement UA2005 scratchpad registers, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 09/29] target-sparc: hypervisor mode takes over nucleus mode, Artyom Tarasenko, 2016/10/01