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[Qemu-devel] [PATCH 08/29] target-sparc: implement UltraSPARC-T1 Strand
From: |
Artyom Tarasenko |
Subject: |
[Qemu-devel] [PATCH 08/29] target-sparc: implement UltraSPARC-T1 Strand status ASR |
Date: |
Sat, 1 Oct 2016 12:05:12 +0200 |
Signed-off-by: Artyom Tarasenko <address@hidden>
---
target-sparc/translate.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index e7691e4..b9c749c 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -3278,6 +3278,17 @@ static void disas_sparc_insn(DisasContext * dc, unsigned
int insn)
case 0x19: /* System tick compare */
gen_store_gpr(dc, rd, cpu_stick_cmpr);
break;
+ case 0x1a: /* UltraSPARC-T1 Strand status */
+ /* XXX HYPV check maybe not enough, UA2005 & UA2007
describe
+ * this ASR as impl. dep
+ */
+ CHECK_IU_FEATURE(dc, HYPV);
+ {
+ TCGv t = gen_dest_gpr(dc, rd);
+ tcg_gen_movi_tl(t, 1UL);
+ gen_store_gpr(dc, rd, t);
+ }
+ break;
case 0x10: /* Performance Control */
case 0x11: /* Performance Instrumentation Counter */
case 0x12: /* Dispatch Control */
--
2.7.2
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, (continued)
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Richard Henderson, 2016/10/11
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Artyom Tarasenko, 2016/10/11
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Richard Henderson, 2016/10/11
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Artyom Tarasenko, 2016/10/12
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, Richard Henderson, 2016/10/12
[Qemu-devel] [PATCH 04/29] target-sparc: add UltraSPARC T1 TLB #defines, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 06/29] target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 05/29] target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 08/29] target-sparc: implement UltraSPARC-T1 Strand status ASR,
Artyom Tarasenko <=
[Qemu-devel] [PATCH 07/29] target-sparc: implement UA2005 scratchpad registers, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 09/29] target-sparc: hypervisor mode takes over nucleus mode, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 11/29] target-sparc: implement UA2005 GL register, Artyom Tarasenko, 2016/10/01