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[Qemu-devel] [PULL 28/34] tests/tcg/mips: Test R5900 MTLO1 and MTHI1
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL 28/34] tests/tcg/mips: Test R5900 MTLO1 and MTHI1 |
Date: |
Mon, 22 Oct 2018 14:57:51 +0200 |
From: Fredrik Noring <address@hidden>
Add a test for MTLO1 and MTHI1.
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Fredrik Noring <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
tests/tcg/mips/mipsr5900/Makefile | 1 +
tests/tcg/mips/mipsr5900/mtlohi1.c | 40 ++++++++++++++++++++++++++++++++++++++
2 files changed, 41 insertions(+)
create mode 100644 tests/tcg/mips/mipsr5900/mtlohi1.c
diff --git a/tests/tcg/mips/mipsr5900/Makefile
b/tests/tcg/mips/mipsr5900/Makefile
index fd8ee6b..287c248 100644
--- a/tests/tcg/mips/mipsr5900/Makefile
+++ b/tests/tcg/mips/mipsr5900/Makefile
@@ -9,6 +9,7 @@ CC = $(CROSS)gcc
CFLAGS = -Wall -mabi=32 -march=r5900 -static
TESTCASES = mflohi1.tst
+TESTCASES += mtlohi1.tst
TESTCASES += mult.tst
TESTCASES += multu.tst
diff --git a/tests/tcg/mips/mipsr5900/mtlohi1.c
b/tests/tcg/mips/mipsr5900/mtlohi1.c
new file mode 100644
index 0000000..7f3e728
--- /dev/null
+++ b/tests/tcg/mips/mipsr5900/mtlohi1.c
@@ -0,0 +1,40 @@
+/*
+ * Test R5900-specific MTLO1 and MTHI1.
+ */
+
+#include <stdio.h>
+#include <inttypes.h>
+#include <assert.h>
+
+int main()
+{
+ int32_t tlo = 12207031, thi = 305175781;
+ int32_t tlo1 = 32452867, thi1 = 49979687;
+ int32_t flo, fhi, flo1, fhi1;
+
+ /* Test both LO/HI and LO1/HI1 to verify separation. */
+ __asm__ __volatile__ (
+ " mtlo %4\n"
+ " mthi %5\n"
+ " mtlo1 %6\n"
+ " mthi1 %7\n"
+ " move %0, $0\n"
+ " move %1, $0\n"
+ " move %2, $0\n"
+ " move %3, $0\n"
+ " mflo %0\n"
+ " mfhi %1\n"
+ " mflo1 %2\n"
+ " mfhi1 %3\n"
+ : "=r" (flo), "=r" (fhi),
+ "=r" (flo1), "=r" (fhi1)
+ : "r" (tlo), "r" (thi),
+ "r" (tlo1), "r" (thi1));
+
+ assert(flo == 12207031);
+ assert(fhi == 305175781);
+ assert(flo1 == 32452867);
+ assert(fhi1 == 49979687);
+
+ return 0;
+}
--
2.7.4
- [Qemu-devel] [PULL 05/34] target/mips: Define R5900 MMI{0, 1, 2, 3} subclasses and MMI opcode constants, (continued)
- [Qemu-devel] [PULL 05/34] target/mips: Define R5900 MMI{0, 1, 2, 3} subclasses and MMI opcode constants, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 07/34] target/mips: Define R5900 MMI1 opcode constants, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 11/34] target/mips: Placeholder for R5900 LQ, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 04/34] target/mips: Define R5900 MMI class, and LQ and SQ opcode constants, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 06/34] target/mips: Define R5900 MMI0 opcode constants, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 03/34] target/mips: R5900 Multimedia Instruction overview note, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 23/34] tests/tcg/mips: Test R5900 three-operand MULT, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 12/34] target/mips: Placeholder for R5900 MMI instruction class, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 18/34] target/mips: Support R5900 three-operand MULT1 and MULTU1 instructions, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 17/34] target/mips: Support R5900 three-operand MULT and MULTU instructions, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 28/34] tests/tcg/mips: Test R5900 MTLO1 and MTHI1,
Aleksandar Markovic <=
- [Qemu-devel] [PULL 22/34] target/mips: R5900 DMULT[U], DDIV[U], LL[D] and SC[D] are user only, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 20/34] target/mips: Support R5900 DIV1 and DIVU1 instructions, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 19/34] target/mips: Support R5900 MFLO1, MTLO1, MFHI1 and MTHI1 instructions, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 16/34] target/mips: Placeholder for R5900 MMI3 instruction subclass, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 13/34] target/mips: Placeholder for R5900 MMI0 instruction subclass, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 14/34] target/mips: Placeholder for R5900 MMI1 instruction subclass, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 21/34] target/mips: Support R5900 MOVN, MOVZ and PREF instructions from MIPS IV, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 24/34] tests/tcg/mips: Test R5900 three-operand MULTU, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 10/34] target/mips: Placeholder for R5900 SQ, handle user mode RDHWR, Aleksandar Markovic, 2018/10/22
- [Qemu-devel] [PULL 15/34] target/mips: Placeholder for R5900 MMI2 instruction subclass, Aleksandar Markovic, 2018/10/22