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Re: [Qemu-devel] [PATCH 2/2] gen_pcie_root_port: Add ACS (Access Control
From: |
Alex Williamson |
Subject: |
Re: [Qemu-devel] [PATCH 2/2] gen_pcie_root_port: Add ACS (Access Control Services) capability |
Date: |
Wed, 23 Jan 2019 12:04:38 -0700 |
On Wed, 23 Jan 2019 19:28:00 +0100
Knut Omang <address@hidden> wrote:
> Claiming ACS support allows passthrough of an emulated device
> (in a nested virt.setting) with VFIO without Alex Williamson's patch
> for the pcie_acs_override kernel parameter.
> A similar need appears on Windows with Hyper-V
>
> Signed-off-by: Knut Omang <address@hidden>
> ---
> hw/pci-bridge/gen_pcie_root_port.c | 2 ++
> hw/pci-bridge/ioh3420.c | 1 -
> hw/pci-bridge/pcie_root_port.c | 3 +++
> include/hw/pci/pcie_port.h | 1 +
> 4 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/pci-bridge/gen_pcie_root_port.c
> b/hw/pci-bridge/gen_pcie_root_port.c
> index 9766edb..b5a5ecc 100644
> --- a/hw/pci-bridge/gen_pcie_root_port.c
> +++ b/hw/pci-bridge/gen_pcie_root_port.c
> @@ -20,6 +20,7 @@
> OBJECT_CHECK(GenPCIERootPort, (obj), TYPE_GEN_PCIE_ROOT_PORT)
>
> #define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100
> +#define GEN_PCIE_ROOT_PORT_ACS_OFFSET 0x148
Perhaps (GEN_PCIE_ROOT_PORT_AER_OFFSET + PCI_ERR_SIZEOF)
> #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR 1
>
> typedef struct GenPCIERootPort {
> @@ -149,6 +150,7 @@ static void gen_rp_dev_class_init(ObjectClass *klass,
> void *data)
> rpc->interrupts_init = gen_rp_interrupts_init;
> rpc->interrupts_uninit = gen_rp_interrupts_uninit;
> rpc->aer_offset = GEN_PCIE_ROOT_PORT_AER_OFFSET;
> + rpc->acs_offset = GEN_PCIE_ROOT_PORT_ACS_OFFSET;
> }
>
> static const TypeInfo gen_rp_dev_info = {
> diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c
> index 81f2de6..2064939 100644
> --- a/hw/pci-bridge/ioh3420.c
> +++ b/hw/pci-bridge/ioh3420.c
> @@ -71,7 +71,6 @@ static int ioh3420_interrupts_init(PCIDevice *d, Error
> **errp)
> if (rc < 0) {
> assert(rc == -ENOTSUP);
> }
> -
Unrelated
> return rc;
> }
>
> diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c
> index 34ad767..c33a493 100644
> --- a/hw/pci-bridge/pcie_root_port.c
> +++ b/hw/pci-bridge/pcie_root_port.c
> @@ -106,6 +106,9 @@ static void rp_realize(PCIDevice *d, Error **errp)
> pcie_aer_root_init(d);
> rp_aer_vector_update(d);
>
> + if (rpc->acs_offset) {
> + pcie_acs_init(d, rpc->acs_offset, 0);
> + }
> return;
>
> err:
> diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
> index df242a0..09586f4 100644
> --- a/include/hw/pci/pcie_port.h
> +++ b/include/hw/pci/pcie_port.h
> @@ -78,6 +78,7 @@ typedef struct PCIERootPortClass {
> int exp_offset;
> int aer_offset;
> int ssvid_offset;
> + int acs_offset; /* If nonzero, optional ACS capability offset */
> int ssid;
> } PCIERootPortClass;
>
[Qemu-devel] [PATCH 2/2] gen_pcie_root_port: Add ACS (Access Control Services) capability, Knut Omang, 2019/01/23
- Re: [Qemu-devel] [PATCH 2/2] gen_pcie_root_port: Add ACS (Access Control Services) capability,
Alex Williamson <=
Re: [Qemu-devel] [PATCH 0/2] pcie: Add simple ACS "support" to the generic PCIe root port, no-reply, 2019/01/31