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From: | Richard Henderson |
Subject: | Re: [Qemu-devel] [PATCH 02/26] hw/intc/armv7m_nvic: Allow reading of M-profile MVFR* registers |
Date: | Tue, 23 Apr 2019 10:27:34 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 |
On 4/16/19 5:57 AM, Peter Maydell wrote: > For M-profile the MVFR* ID registers are memory mapped, in the > range we implement via the NVIC. Allow them to be read. > (If the CPU has no FPU, these registers are defined to be RAZ.) > > Signed-off-by: Peter Maydell <address@hidden> > --- > hw/intc/armv7m_nvic.c | 6 ++++++ > 1 file changed, 6 insertions(+) Reviewed-by: Richard Henderson <address@hidden> r~
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