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Re: [Qemu-devel] [PATCH v3 38/39] tcg/arm: Use LDRD to load tlb mask+tab
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] [PATCH v3 38/39] tcg/arm: Use LDRD to load tlb mask+table |
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Date: |
Sat, 11 May 2019 12:13:32 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 |
On 5/10/19 2:08 PM, Alistair Francis wrote:
>> + if (use_armv6_instructions && TARGET_LONG_BITS == 64) {
>> + tcg_out_ldrd_8(s, COND_AL, TCG_REG_R2, TCG_REG_R1, cmp_off);
...
>
> This is complex and I'm probably misunderstanding something but isn't
> it possible for TCG_REG_R3 to not be set if use_armv6_instructions is
> true and TARGET_LONG_BITS is 64?
No, the LDRD instruction loads data into both R2 and R2+1 = R3.
r~
- Re: [Qemu-devel] [PATCH v3 29/39] target/unicore32: Use env_cpu, env_archcpu, (continued)
- [Qemu-devel] [PATCH v3 31/39] cpu: Move ENV_OFFSET to exec/gen-icount.h, Richard Henderson, 2019/05/07
- [Qemu-devel] [PATCH v3 30/39] target/xtensa: Use env_cpu, env_archcpu, Richard Henderson, 2019/05/07
- [Qemu-devel] [PATCH v3 33/39] cpu: Introduce CPUNegativeOffsetState, Richard Henderson, 2019/05/07
- [Qemu-devel] [PATCH v3 37/39] tcg/aarch64: Use LDP to load tlb mask+table, Richard Henderson, 2019/05/07
- [Qemu-devel] [PATCH v3 38/39] tcg/arm: Use LDRD to load tlb mask+table, Richard Henderson, 2019/05/07
- [Qemu-devel] [PATCH v3 34/39] cpu: Move icount_decr to CPUNegativeOffsetState, Richard Henderson, 2019/05/07
- [Qemu-devel] [PATCH v3 35/39] cpu: Move the softmmu tlb to CPUNegativeOffsetState, Richard Henderson, 2019/05/07
- [Qemu-devel] [PATCH v3 36/39] cpu: Remove CPU_COMMON, Richard Henderson, 2019/05/07
- [Qemu-devel] [PATCH v3 39/39] tcg/arm: Remove mostly unreachable tlb special case, Richard Henderson, 2019/05/07