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Re: [Qemu-devel] [PATCH v2 19/68] target/arm: Convert T32 ADDW/SUBW


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH v2 19/68] target/arm: Convert T32 ADDW/SUBW
Date: Fri, 23 Aug 2019 15:47:12 +0100

On Fri, 23 Aug 2019 at 15:45, Richard Henderson
<address@hidden> wrote:
>
> On 8/23/19 6:04 AM, Peter Maydell wrote:
> >> +&ri              rd imm
> >>  &r               rm
> >>  &i               imm
> >>  &msr_reg         rn r mask
> >
> > Should this change be in some other patch ?
>
> No, it's used by ADR.
>
> >> +  ADR            1111 0.1 0000 0 1111 0 ... rd:4 ........ \
> >> +                 &ri imm=%imm12_26_12_0
>
> ... here.

This is in t32.decode, which has its own definition of &ri.
The one I was asking about was the one in a32.decode -- the
addition of that line is the only change to a32.decode in this patch.

thanks
-- PMM



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