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[PULL 29/37] hw/arm/cubieboard: restrict allowed RAM size to 512MiB and
From: |
Peter Maydell |
Subject: |
[PULL 29/37] hw/arm/cubieboard: restrict allowed RAM size to 512MiB and 1GiB |
Date: |
Thu, 5 Mar 2020 16:30:52 +0000 |
From: Niek Linnenbank <address@hidden>
The Cubieboard contains either 512MiB or 1GiB of onboard RAM [1].
Prevent changing RAM to a different size which could break user programs.
[1] http://linux-sunxi.org/Cubieboard
Signed-off-by: Niek Linnenbank <address@hidden>
Message-id: address@hidden
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/cubieboard.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index 010375f0a8d..6c55d9056f5 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -33,6 +33,13 @@ static void cubieboard_init(MachineState *machine)
AwA10State *a10;
Error *err = NULL;
+ /* This board has fixed size RAM (512MiB or 1GiB) */
+ if (machine->ram_size != 512 * MiB &&
+ machine->ram_size != 1 * GiB) {
+ error_report("This machine can only be used with 512MiB or 1GiB RAM");
+ exit(1);
+ }
+
/* Only allow Cortex-A8 for this board */
if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a8")) != 0) {
error_report("This board can only be used with cortex-a8 CPU");
@@ -78,6 +85,7 @@ static void cubieboard_machine_init(MachineClass *mc)
{
mc->desc = "cubietech cubieboard (Cortex-A8)";
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8");
+ mc->default_ram_size = 1 * GiB;
mc->init = cubieboard_init;
mc->block_default_type = IF_IDE;
mc->units_per_default_bus = 1;
--
2.20.1
- [PULL 09/37] hw/arm/z2: Simplify since the machines are little-endian only, (continued)
- [PULL 09/37] hw/arm/z2: Simplify since the machines are little-endian only, Peter Maydell, 2020/03/05
- [PULL 08/37] hw/arm/omap_sx1: Simplify since the machines are little-endian only, Peter Maydell, 2020/03/05
- [PULL 11/37] hw/arm/pxa2xx: move timer_new from init() into realize() to avoid memleaks, Peter Maydell, 2020/03/05
- [PULL 15/37] target/arm: Improve masking of HCR/HCR2 RES0 bits, Peter Maydell, 2020/03/05
- [PULL 16/37] target/arm: Add HCR_EL2 bit definitions from ARMv8.6, Peter Maydell, 2020/03/05
- [PULL 18/37] target/arm: Remove EL2 and EL3 setup from user-only, Peter Maydell, 2020/03/05
- [PULL 21/37] target/arm: Honor the HCR_EL2.TSW bit, Peter Maydell, 2020/03/05
- [PULL 22/37] target/arm: Honor the HCR_EL2.TACR bit, Peter Maydell, 2020/03/05
- [PULL 24/37] target/arm: Honor the HCR_EL2.TPU bit, Peter Maydell, 2020/03/05
- [PULL 25/37] target/arm: Honor the HCR_EL2.TTLB bit, Peter Maydell, 2020/03/05
- [PULL 29/37] hw/arm/cubieboard: restrict allowed RAM size to 512MiB and 1GiB,
Peter Maydell <=
- [PULL 27/37] hw/arm/cubieboard: use ARM Cortex-A8 as the default CPU in machine definition, Peter Maydell, 2020/03/05
- [PULL 30/37] hw/arm/cubieboard: report error when using unsupported -bios argument, Peter Maydell, 2020/03/05
- [PULL 26/37] tests/tcg/aarch64: Add newline in pauth-1 printf, Peter Maydell, 2020/03/05
- [PULL 34/37] target/arm: Apply TBI to ESR_ELx in helper_exception_return, Peter Maydell, 2020/03/05
- [PULL 36/37] target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva, Peter Maydell, 2020/03/05
- [PULL 31/37] target/arm: Replicate TBI/TBID bits for single range regimes, Peter Maydell, 2020/03/05
- [PULL 32/37] target/arm: Optimize cpu_mmu_index, Peter Maydell, 2020/03/05
- [PULL 33/37] target/arm: Introduce core_to_aa64_mmu_idx, Peter Maydell, 2020/03/05
- [PULL 20/37] target/arm: Honor the HCR_EL2.{TVM,TRVM} bits, Peter Maydell, 2020/03/05
- [PULL 23/37] target/arm: Honor the HCR_EL2.TPCP bit, Peter Maydell, 2020/03/05