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[PULL 27/37] hw/arm/cubieboard: use ARM Cortex-A8 as the default CPU in
From: |
Peter Maydell |
Subject: |
[PULL 27/37] hw/arm/cubieboard: use ARM Cortex-A8 as the default CPU in machine definition |
Date: |
Thu, 5 Mar 2020 16:30:50 +0000 |
From: Niek Linnenbank <address@hidden>
The Cubieboard is a singleboard computer with an Allwinner A10 System-on-Chip
[1].
As documented in the Allwinner A10 User Manual V1.5 [2], the SoC has an ARM
Cortex-A8 processor. Currently the Cubieboard machine definition specifies the
ARM Cortex-A9 in its description and as the default CPU.
This patch corrects the Cubieboard machine definition to use the ARM Cortex-A8.
The only user-visible effect is that our textual description of the
machine was wrong, because hw/arm/allwinner-a10.c always creates a
Cortex-A8 CPU regardless of the default value in the MachineClass struct.
[1] http://docs.cubieboard.org/products/start#cubieboard1
[2] https://linux-sunxi.org/File:Allwinner_A10_User_manual_V1.5.pdf
Fixes: 8a863c8120994981a099
Signed-off-by: Niek Linnenbank <address@hidden>
Message-id: address@hidden
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
[note in commit message that the bug didn't have much visible effect]
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/cubieboard.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index 089f9a30c12..0195925c73d 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -68,8 +68,8 @@ static void cubieboard_init(MachineState *machine)
static void cubieboard_machine_init(MachineClass *mc)
{
- mc->desc = "cubietech cubieboard (Cortex-A9)";
- mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
+ mc->desc = "cubietech cubieboard (Cortex-A8)";
+ mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8");
mc->init = cubieboard_init;
mc->block_default_type = IF_IDE;
mc->units_per_default_bus = 1;
--
2.20.1
- [PULL 08/37] hw/arm/omap_sx1: Simplify since the machines are little-endian only, (continued)
- [PULL 08/37] hw/arm/omap_sx1: Simplify since the machines are little-endian only, Peter Maydell, 2020/03/05
- [PULL 11/37] hw/arm/pxa2xx: move timer_new from init() into realize() to avoid memleaks, Peter Maydell, 2020/03/05
- [PULL 15/37] target/arm: Improve masking of HCR/HCR2 RES0 bits, Peter Maydell, 2020/03/05
- [PULL 16/37] target/arm: Add HCR_EL2 bit definitions from ARMv8.6, Peter Maydell, 2020/03/05
- [PULL 18/37] target/arm: Remove EL2 and EL3 setup from user-only, Peter Maydell, 2020/03/05
- [PULL 21/37] target/arm: Honor the HCR_EL2.TSW bit, Peter Maydell, 2020/03/05
- [PULL 22/37] target/arm: Honor the HCR_EL2.TACR bit, Peter Maydell, 2020/03/05
- [PULL 24/37] target/arm: Honor the HCR_EL2.TPU bit, Peter Maydell, 2020/03/05
- [PULL 25/37] target/arm: Honor the HCR_EL2.TTLB bit, Peter Maydell, 2020/03/05
- [PULL 29/37] hw/arm/cubieboard: restrict allowed RAM size to 512MiB and 1GiB, Peter Maydell, 2020/03/05
- [PULL 27/37] hw/arm/cubieboard: use ARM Cortex-A8 as the default CPU in machine definition,
Peter Maydell <=
- [PULL 30/37] hw/arm/cubieboard: report error when using unsupported -bios argument, Peter Maydell, 2020/03/05
- [PULL 26/37] tests/tcg/aarch64: Add newline in pauth-1 printf, Peter Maydell, 2020/03/05
- [PULL 34/37] target/arm: Apply TBI to ESR_ELx in helper_exception_return, Peter Maydell, 2020/03/05
- [PULL 36/37] target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva, Peter Maydell, 2020/03/05
- [PULL 31/37] target/arm: Replicate TBI/TBID bits for single range regimes, Peter Maydell, 2020/03/05
- [PULL 32/37] target/arm: Optimize cpu_mmu_index, Peter Maydell, 2020/03/05
- [PULL 33/37] target/arm: Introduce core_to_aa64_mmu_idx, Peter Maydell, 2020/03/05
- [PULL 20/37] target/arm: Honor the HCR_EL2.{TVM,TRVM} bits, Peter Maydell, 2020/03/05
- [PULL 23/37] target/arm: Honor the HCR_EL2.TPCP bit, Peter Maydell, 2020/03/05
- [PULL 37/37] target/arm: Clean address for DC ZVA, Peter Maydell, 2020/03/05