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[PULL 31/37] target/arm: Replicate TBI/TBID bits for single range regime
From: |
Peter Maydell |
Subject: |
[PULL 31/37] target/arm: Replicate TBI/TBID bits for single range regimes |
Date: |
Thu, 5 Mar 2020 16:30:54 +0000 |
From: Richard Henderson <address@hidden>
Replicate the single TBI bit from TCR_EL2 and TCR_EL3 so that
we can unconditionally use pointer bit 55 to index into our
composite TBI1:TBI0 field.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 6abf52db660..f7ba34bbf6d 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -10458,7 +10458,8 @@ static int aa64_va_parameter_tbi(uint64_t tcr,
ARMMMUIdx mmu_idx)
} else if (mmu_idx == ARMMMUIdx_Stage2) {
return 0; /* VTCR_EL2 */
} else {
- return extract32(tcr, 20, 1);
+ /* Replicate the single TBI bit so we always have 2 bits. */
+ return extract32(tcr, 20, 1) * 3;
}
}
@@ -10469,7 +10470,8 @@ static int aa64_va_parameter_tbid(uint64_t tcr,
ARMMMUIdx mmu_idx)
} else if (mmu_idx == ARMMMUIdx_Stage2) {
return 0; /* VTCR_EL2 */
} else {
- return extract32(tcr, 29, 1);
+ /* Replicate the single TBID bit so we always have 2 bits. */
+ return extract32(tcr, 29, 1) * 3;
}
}
--
2.20.1
- [PULL 21/37] target/arm: Honor the HCR_EL2.TSW bit, (continued)
- [PULL 21/37] target/arm: Honor the HCR_EL2.TSW bit, Peter Maydell, 2020/03/05
- [PULL 22/37] target/arm: Honor the HCR_EL2.TACR bit, Peter Maydell, 2020/03/05
- [PULL 24/37] target/arm: Honor the HCR_EL2.TPU bit, Peter Maydell, 2020/03/05
- [PULL 25/37] target/arm: Honor the HCR_EL2.TTLB bit, Peter Maydell, 2020/03/05
- [PULL 29/37] hw/arm/cubieboard: restrict allowed RAM size to 512MiB and 1GiB, Peter Maydell, 2020/03/05
- [PULL 27/37] hw/arm/cubieboard: use ARM Cortex-A8 as the default CPU in machine definition, Peter Maydell, 2020/03/05
- [PULL 30/37] hw/arm/cubieboard: report error when using unsupported -bios argument, Peter Maydell, 2020/03/05
- [PULL 26/37] tests/tcg/aarch64: Add newline in pauth-1 printf, Peter Maydell, 2020/03/05
- [PULL 34/37] target/arm: Apply TBI to ESR_ELx in helper_exception_return, Peter Maydell, 2020/03/05
- [PULL 36/37] target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva, Peter Maydell, 2020/03/05
- [PULL 31/37] target/arm: Replicate TBI/TBID bits for single range regimes,
Peter Maydell <=
- [PULL 32/37] target/arm: Optimize cpu_mmu_index, Peter Maydell, 2020/03/05
- [PULL 33/37] target/arm: Introduce core_to_aa64_mmu_idx, Peter Maydell, 2020/03/05
- [PULL 20/37] target/arm: Honor the HCR_EL2.{TVM,TRVM} bits, Peter Maydell, 2020/03/05
- [PULL 23/37] target/arm: Honor the HCR_EL2.TPCP bit, Peter Maydell, 2020/03/05
- [PULL 37/37] target/arm: Clean address for DC ZVA, Peter Maydell, 2020/03/05
- [PULL 35/37] target/arm: Move helper_dc_zva to helper-a64.c, Peter Maydell, 2020/03/05
- [PULL 01/37] hw/arm: versal: Add support for the LPD ADMAs, Peter Maydell, 2020/03/05
- [PULL 07/37] hw/arm/mainstone: Simplify since the machines are little-endian only, Peter Maydell, 2020/03/05
- [PULL 13/37] hw/arm/strongarm: move timer_new from init() into realize() to avoid memleaks, Peter Maydell, 2020/03/05
- [PULL 12/37] hw/arm/spitz: move timer_new from init() into realize() to avoid memleaks, Peter Maydell, 2020/03/05