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[RFC PATCH 23/25] Temp: acpi/cxl: Add ACPI0017 (CEDT awareness)
From: |
Ben Widawsky |
Subject: |
[RFC PATCH 23/25] Temp: acpi/cxl: Add ACPI0017 (CEDT awareness) |
Date: |
Tue, 10 Nov 2020 21:47:22 -0800 |
This represents Intel's proposal for how the system firmware can notify
Linux that the CEDT exists and provides a driver attach point. It is not
in the CXL 2.0 specification as of now.
CXL 2.0 specification adds an _HID, ACPI0016, for CXL capable host
bridges, with a _CID of PNP0A08 (PCIe host bridge). CXL aware software
is able to use this initiate the proper _OSC method, and get the _UID
which is referenced by the CEDT. Therefore the existence of an ACPI0016
device allows a CXL aware driver perform the necessary actions. For a
CXL capable OS, this works. For a CXL unaware OS, this works.
The motivation for ACPI0017 is to provide the possibility of having a
Linux CXL module that can work on a legacy Linux kernel. Linux core
PCI/ACPI which won't be built as a module, will see the _CID of PNP0A08
and bind a driver to it. If we later loaded a driver for ACPI0016, Linux
won't be able to bind it to the hardware because it has already bound
the PNP0A08 driver. The ACPI0017 device is an opportunity to have an
object to bind a driver will be used by a Linux driver to walk the CXL
topology and do everything that we would have preferred to do with
ACPI0016.
There is another motivation for an ACPI0017 device which isn't
implemented here. An operating system needs an attach point for a
non-volatile region provider that understands cross-hostbridge
interleaving. Since QEMU emulation doesn't support interleaving yet,
this is more important on the OS side, for now.
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
---
hw/i386/acpi-build.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index eda62dcd6a..d080e24228 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1513,6 +1513,19 @@ static void init_pci_acpi(Aml *dev, int uid, int type)
}
}
+static void build_acpi0017(Aml *table)
+{
+ Aml *dev;
+ Aml *scope;
+
+ scope = aml_scope("_SB");
+ dev = aml_device("CXLM");
+ aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0017")));
+
+ aml_append(scope, dev);
+ aml_append(table, scope);
+}
+
static void
build_dsdt(GArray *table_data, BIOSLinker *linker,
AcpiPmInfo *pm, AcpiMiscInfo *misc,
@@ -1529,6 +1542,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
int root_bus_limit = 0xFF;
PCIBus *bus = NULL;
TPMIf *tpm = tpm_find();
+ bool cxl_present = false;
int i;
VMBusBridge *vmbus_bridge = vmbus_bridge_find();
@@ -1683,6 +1697,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
/* Handle the ranges for the PXB expanders */
if (type == CXL) {
+ cxl_present = true;
uint64_t base = CXL_HOST_BASE + uid * 0x10000;
crs_range_insert(crs_range_set.mem_ranges, base,
base + 0x10000 - 1);
@@ -1690,6 +1705,10 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
}
}
+ if (cxl_present) {
+ build_acpi0017(dsdt);
+ }
+
/*
* At this point crs_range_set has all the ranges used by pci
* busses *other* than PCI0. These ranges will be excluded from
--
2.29.2
- Re: [RFC PATCH 18/25] hw/cxl/device: Add a memory device (8.2.8.5), (continued)
[RFC PATCH 19/25] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12), Ben Widawsky, 2020/11/11
[RFC PATCH 20/25] acpi/cxl: Add _OSC implementation (9.14.2), Ben Widawsky, 2020/11/11
[RFC PATCH 22/25] acpi/cxl: Create the CEDT (9.14.1), Ben Widawsky, 2020/11/11
[RFC PATCH 21/25] acpi/cxl: Introduce a compat-driver UUID for CXL _OSC, Ben Widawsky, 2020/11/11
[RFC PATCH 23/25] Temp: acpi/cxl: Add ACPI0017 (CEDT awareness),
Ben Widawsky <=
[RFC PATCH 25/25] qtest/cxl: Add very basic sanity tests, Ben Widawsky, 2020/11/11
[RFC PATCH 24/25] WIP: i386/cxl: Initialize a host bridge, Ben Widawsky, 2020/11/11
Re: [RFC PATCH 00/25] Introduce CXL 2.0 Emulation, Jonathan Cameron, 2020/11/16