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[PULL 07/19] ppc/pnv: Use skiboot addresses to load kernel and ramfs
From: |
David Gibson |
Subject: |
[PULL 07/19] ppc/pnv: Use skiboot addresses to load kernel and ramfs |
Date: |
Wed, 10 Feb 2021 17:17:23 +1100 |
From: Cédric Le Goater <clg@kaod.org>
The current settings are useful to load large kernels (with debug) but
it moves the initrd image in a memory region not protected by
skiboot. If skiboot is compiled with DEBUG=1, memory poisoning will
corrupt the initrd.
Cc: Murilo Opsfelder Araujo <muriloo@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210126171059.307867-4-clg@kaod.org>
Reviewed-by: Murilo Opsfelder Araujo <muriloo@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/pnv.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 14fc9758a9..e500c2e243 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -65,9 +65,9 @@
#define FW_MAX_SIZE (16 * MiB)
#define KERNEL_LOAD_ADDR 0x20000000
-#define KERNEL_MAX_SIZE (256 * MiB)
-#define INITRD_LOAD_ADDR 0x60000000
-#define INITRD_MAX_SIZE (256 * MiB)
+#define KERNEL_MAX_SIZE (128 * MiB)
+#define INITRD_LOAD_ADDR 0x28000000
+#define INITRD_MAX_SIZE (128 * MiB)
static const char *pnv_chip_core_typename(const PnvChip *o)
{
--
2.29.2
- [PULL 04/19] target/ppc: Remove unused MMU definitions, (continued)
- [PULL 04/19] target/ppc: Remove unused MMU definitions, David Gibson, 2021/02/10
- [PULL 01/19] spapr.c: use g_auto* with 'nodename' in CPU DT functions, David Gibson, 2021/02/10
- [PULL 02/19] spapr.c: add 'name' property for hotplugged CPUs nodes, David Gibson, 2021/02/10
- [PULL 06/19] ppc/xive: Add firmware bit when dumping the ENDs, David Gibson, 2021/02/10
- [PULL 08/19] ppc/pnv: Simplify pnv_bmc_create(), David Gibson, 2021/02/10
- [PULL 05/19] ppc/pnv: Add trace events for PCI event notification, David Gibson, 2021/02/10
- [PULL 09/19] ppc/pnv: Discard internal BMC initialization when BMC is external, David Gibson, 2021/02/10
- [PULL 03/19] spapr: Adjust firmware path of PCI devices, David Gibson, 2021/02/10
- [PULL 14/19] spapr_numa.c: fix ibm, max-associativity-domains calculation, David Gibson, 2021/02/10
- [PULL 19/19] target/ppc: Add E500 L2CSR0 write helper, David Gibson, 2021/02/10
- [PULL 07/19] ppc/pnv: Use skiboot addresses to load kernel and ramfs,
David Gibson <=
- [PULL 10/19] ppc/pnv: Remove default disablement of the PNOR contents, David Gibson, 2021/02/10
- [PULL 11/19] ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR, David Gibson, 2021/02/10
- [PULL 16/19] hw/ppc: e500: Use a macro for the platform clock frequency, David Gibson, 2021/02/10
- [PULL 12/19] spapr: move spapr_machine_using_legacy_numa() to spapr_numa.c, David Gibson, 2021/02/10
- [PULL 18/19] hw/net: fsl_etsec: Reverse the RCTRL.RSF logic, David Gibson, 2021/02/10
- [PULL 13/19] spapr_numa.c: create spapr_numa_initial_nvgpu_numa_id() helper, David Gibson, 2021/02/10
- [PULL 15/19] ppc/pnv: Set default RAM size to 1 GB, David Gibson, 2021/02/10
- [PULL 17/19] hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes, David Gibson, 2021/02/10
- Re: [PULL 00/19] ppc-for-6.0 queue 20210210, Peter Maydell, 2021/02/10