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[PULL 11/19] ppc/pnv: Introduce a LPC FW memory region attribute to map
From: |
David Gibson |
Subject: |
[PULL 11/19] ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR |
Date: |
Wed, 10 Feb 2021 17:17:27 +1100 |
From: Cédric Le Goater <clg@kaod.org>
This to map the PNOR from the machine init handler directly and finish
the cleanup of the LPC model.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210126171059.307867-8-clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/pnv.c | 11 +++++++++++
hw/ppc/pnv_lpc.c | 7 -------
include/hw/ppc/pnv.h | 1 +
3 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index e500c2e243..50810df838 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -871,6 +871,14 @@ static void pnv_init(MachineState *machine)
pnv_ipmi_bt_init(pnv->isa_bus, pnv->bmc, 10);
}
+ /*
+ * The PNOR is mapped on the LPC FW address space by the BMC.
+ * Since we can not reach the remote BMC machine with LPC memops,
+ * map it always for now.
+ */
+ memory_region_add_subregion(pnv->chips[0]->fw_mr, PNOR_SPI_OFFSET,
+ &pnv->pnor->mmio);
+
/*
* OpenPOWER systems use a IPMI SEL Event message to notify the
* host to powerdown
@@ -1150,6 +1158,7 @@ static void pnv_chip_power8_realize(DeviceState *dev,
Error **errp)
qdev_realize(DEVICE(&chip8->lpc), NULL, &error_fatal);
pnv_xscom_add_subregion(chip, PNV_XSCOM_LPC_BASE, &chip8->lpc.xscom_regs);
+ chip->fw_mr = &chip8->lpc.isa_fw;
chip->dt_isa_nodename = g_strdup_printf("/xscom@%" PRIx64 "/isa@%x",
(uint64_t) PNV_XSCOM_BASE(chip),
PNV_XSCOM_LPC_BASE);
@@ -1479,6 +1488,7 @@ static void pnv_chip_power9_realize(DeviceState *dev,
Error **errp)
memory_region_add_subregion(get_system_memory(), PNV9_LPCM_BASE(chip),
&chip9->lpc.xscom_regs);
+ chip->fw_mr = &chip9->lpc.isa_fw;
chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
(uint64_t) PNV9_LPCM_BASE(chip));
@@ -1592,6 +1602,7 @@ static void pnv_chip_power10_realize(DeviceState *dev,
Error **errp)
memory_region_add_subregion(get_system_memory(), PNV10_LPCM_BASE(chip),
&chip10->lpc.xscom_regs);
+ chip->fw_mr = &chip10->lpc.isa_fw;
chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
(uint64_t) PNV10_LPCM_BASE(chip));
}
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
index 11739e397b..bcbca3db97 100644
--- a/hw/ppc/pnv_lpc.c
+++ b/hw/ppc/pnv_lpc.c
@@ -824,7 +824,6 @@ ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool
use_cpld, Error **errp)
ISABus *isa_bus;
qemu_irq *irqs;
qemu_irq_handler handler;
- PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine());
/* let isa_bus_new() create its own bridge on SysBus otherwise
* devices specified on the command line won't find the bus and
@@ -850,11 +849,5 @@ ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool
use_cpld, Error **errp)
isa_bus_irqs(isa_bus, irqs);
- /*
- * TODO: Map PNOR on the LPC FW address space on demand ?
- */
- memory_region_add_subregion(&lpc->isa_fw, PNOR_SPI_OFFSET,
- &pnv->pnor->mmio);
-
return isa_bus;
}
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index ee7eda3e01..d69cee17b2 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -58,6 +58,7 @@ struct PnvChip {
MemoryRegion xscom;
AddressSpace xscom_as;
+ MemoryRegion *fw_mr;
gchar *dt_isa_nodename;
};
--
2.29.2
- [PULL 02/19] spapr.c: add 'name' property for hotplugged CPUs nodes, (continued)
- [PULL 02/19] spapr.c: add 'name' property for hotplugged CPUs nodes, David Gibson, 2021/02/10
- [PULL 06/19] ppc/xive: Add firmware bit when dumping the ENDs, David Gibson, 2021/02/10
- [PULL 08/19] ppc/pnv: Simplify pnv_bmc_create(), David Gibson, 2021/02/10
- [PULL 05/19] ppc/pnv: Add trace events for PCI event notification, David Gibson, 2021/02/10
- [PULL 09/19] ppc/pnv: Discard internal BMC initialization when BMC is external, David Gibson, 2021/02/10
- [PULL 03/19] spapr: Adjust firmware path of PCI devices, David Gibson, 2021/02/10
- [PULL 14/19] spapr_numa.c: fix ibm, max-associativity-domains calculation, David Gibson, 2021/02/10
- [PULL 19/19] target/ppc: Add E500 L2CSR0 write helper, David Gibson, 2021/02/10
- [PULL 07/19] ppc/pnv: Use skiboot addresses to load kernel and ramfs, David Gibson, 2021/02/10
- [PULL 10/19] ppc/pnv: Remove default disablement of the PNOR contents, David Gibson, 2021/02/10
- [PULL 11/19] ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR,
David Gibson <=
- [PULL 16/19] hw/ppc: e500: Use a macro for the platform clock frequency, David Gibson, 2021/02/10
- [PULL 12/19] spapr: move spapr_machine_using_legacy_numa() to spapr_numa.c, David Gibson, 2021/02/10
- [PULL 18/19] hw/net: fsl_etsec: Reverse the RCTRL.RSF logic, David Gibson, 2021/02/10
- [PULL 13/19] spapr_numa.c: create spapr_numa_initial_nvgpu_numa_id() helper, David Gibson, 2021/02/10
- [PULL 15/19] ppc/pnv: Set default RAM size to 1 GB, David Gibson, 2021/02/10
- [PULL 17/19] hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes, David Gibson, 2021/02/10
- Re: [PULL 00/19] ppc-for-6.0 queue 20210210, Peter Maydell, 2021/02/10