Re: [PATCH v3 10/15] target/riscv: Add a REQUIRE

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Re: [PATCH v3 10/15] target/riscv: Add a REQUIRE_32BIT macro

From:	Richard Henderson
Subject:	Re: [PATCH v3 10/15] target/riscv: Add a REQUIRE_32BIT macro
Date:	Mon, 23 Aug 2021 10:25:27 -0700
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0

On 8/23/21 9:40 AM, Philipp Tomsich wrote:

With the changes to Zb[abcs], there's some encodings that are
different in RV64 and RV32 (e.g., for rev8 and zext.h). For these,
we'll need a helper macro allowing us to select on RV32, as well.

Signed-off-by: Philipp Tomsich<philipp.tomsich@vrull.eu>
---

Changes in v3:
- Moved the REQUIRE_32BIT macro into a separate commit.

  target/riscv/translate.c | 6 ++++++
  1 file changed, 6 insertions(+)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

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Re: [PATCH v3 03/15] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits, (continued)
- [PATCH v3 04/15] target/riscv: Remove the W-form instructions from Zbs, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 04/15] target/riscv: Remove the W-form instructions from Zbs, Richard Henderson, 2021/08/23
- [PATCH v3 05/15] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B), Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 05/15] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B), Richard Henderson, 2021/08/23
- [PATCH v3 01/15] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 01/15] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties, Richard Henderson, 2021/08/23
- [PATCH v3 06/15] target/riscv: Reassign instructions to the Zbs-extension, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 06/15] target/riscv: Reassign instructions to the Zbs-extension, Richard Henderson, 2021/08/23
- [PATCH v3 10/15] target/riscv: Add a REQUIRE_32BIT macro, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 10/15] target/riscv: Add a REQUIRE_32BIT macro, Richard Henderson <=
- [PATCH v3 12/15] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 12/15] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh, Richard Henderson, 2021/08/23
- [PATCH v3 07/15] target/riscv: Add instructions of the Zbc-extension, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 07/15] target/riscv: Add instructions of the Zbc-extension, Richard Henderson, 2021/08/23
- [PATCH v3 08/15] target/riscv: Reassign instructions to the Zbb-extension, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 08/15] target/riscv: Reassign instructions to the Zbb-extension, Richard Henderson, 2021/08/23
- [PATCH v3 14/15] target/riscv: rewrite slli.uw implementation to mirror formal spec, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 14/15] target/riscv: rewrite slli.uw implementation to mirror formal spec, Richard Henderson, 2021/08/23
- [PATCH v3 09/15] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 09/15] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Richard Henderson, 2021/08/23

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