Re: [PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface.

[Yoshinori Sato]

On Tue, 01 Feb 2022 15:48:58 +0900,
Thomas Huth wrote:
> 
> On 31/01/2022 10.42, Yoshinori Sato wrote:
> > SCI does not have a fifo, it is necessary to send and receive
> >   at a bit rate speed.
> > But, qemu's chardev backend does not have a buffer,
> >   so it sends received data continuously.
> > By buffering the received data with the FIFO, continuous
> >   received data can be received.
> 
>  Hi!
> 
> If you describe it like this, it sounds like you're now emulating a
> buffer that is not there with real hardware? Is that really what you
> want here, i.e. wouldn't this hide problems with the real hardware
> that are mitigated in QEMU with this buffer?

There is no such buffer in the real hardware.
It's not possible with real hardware, but the chardev backend passes
data faster than the bitrate.
There is no problem if the received data is supplied at the timing when
it can be received, but since it is difficult to match the timing accurately,
we expect that the buffer will absorb the difference in timing.

> Anyway, please use scripts/get_maintainer.pl to get a list of people
> who should be put on CC:, otherwise your patches might get lost in the
> high traffic of the mailing list.

OK.

> 
>  Thomas
> 
> 

--
Yoshinori Sato