Re: [PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface.

[Peter Maydell]

On Tue, 1 Feb 2022 at 17:47, Yoshinori Sato <ysato@users.sourceforge.jp> wrote:
>
> On Tue, 01 Feb 2022 15:48:58 +0900,
> Thomas Huth wrote:
> >
> > On 31/01/2022 10.42, Yoshinori Sato wrote:
> > If you describe it like this, it sounds like you're now emulating a
> > buffer that is not there with real hardware? Is that really what you
> > want here, i.e. wouldn't this hide problems with the real hardware
> > that are mitigated in QEMU with this buffer?
>
> There is no such buffer in the real hardware.
> It's not possible with real hardware, but the chardev backend passes
> data faster than the bitrate.
> There is no problem if the received data is supplied at the timing when
> it can be received, but since it is difficult to match the timing accurately,
> we expect that the buffer will absorb the difference in timing.

If you can't accept receiving more data from the chardev backend,
your serial device model should be returning 0 from can_receive.

I don't think we should model a FIFO that doesn't exist in
the real hardware.

thanks
-- PMM