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[PULL 44/87] target/ppc: Implement xvtlsbb instruction
From: |
Cédric Le Goater |
Subject: |
[PULL 44/87] target/ppc: Implement xvtlsbb instruction |
Date: |
Wed, 2 Mar 2022 12:07:20 +0100 |
From: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-39-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/insn32.decode | 7 +++++
target/ppc/translate/vsx-impl.c.inc | 40 +++++++++++++++++++++++++++++
2 files changed, 47 insertions(+)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index c28cc13325fe..973cda113166 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -155,6 +155,9 @@
&XX2 xt xb uim:uint8_t
@XX2 ...... ..... ... uim:2 ..... ......... .. &XX2 xt=%xx_xt
xb=%xx_xb
+&XX2_bf_xb bf xb
+@XX2_bf_xb ...... bf:3 .. ..... ..... ......... . . &XX2_bf_xb
xb=%xx_xb
+
&XX3 xt xa xb
@XX3 ...... ..... ..... ..... ........ ... &XX3 xt=%xx_xt
xa=%xx_xa xb=%xx_xb
@@ -666,6 +669,10 @@ XSMINJDP 111100 ..... ..... ..... 10011000 ...
@XX3
XSCVQPDP 111111 ..... 10100 ..... 1101000100 . @X_tb_rc
+## VSX Vector Test Least-Significant Bit by Byte Instruction
+
+XVTLSBB 111100 ... -- 00010 ..... 111011011 . - @XX2_bf_xb
+
### rfebb
&XL_s s:uint8_t
@XL_s ......-------------- s:1 .......... - &XL_s
diff --git a/target/ppc/translate/vsx-impl.c.inc
b/target/ppc/translate/vsx-impl.c.inc
index 292a14f5aa98..4da889531bd7 100644
--- a/target/ppc/translate/vsx-impl.c.inc
+++ b/target/ppc/translate/vsx-impl.c.inc
@@ -1704,6 +1704,46 @@ static bool trans_LXVKQ(DisasContext *ctx, arg_X_uim5 *a)
return true;
}
+static bool trans_XVTLSBB(DisasContext *ctx, arg_XX2_bf_xb *a)
+{
+ TCGv_i64 xb, t0, t1, all_true, all_false, mask, zero;
+
+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
+ REQUIRE_VSX(ctx);
+
+ xb = tcg_temp_new_i64();
+ t0 = tcg_temp_new_i64();
+ t1 = tcg_temp_new_i64();
+ all_true = tcg_temp_new_i64();
+ all_false = tcg_temp_new_i64();
+ mask = tcg_constant_i64(dup_const(MO_8, 1));
+ zero = tcg_constant_i64(0);
+
+ get_cpu_vsr(xb, a->xb, true);
+ tcg_gen_and_i64(t0, mask, xb);
+ get_cpu_vsr(xb, a->xb, false);
+ tcg_gen_and_i64(t1, mask, xb);
+
+ tcg_gen_or_i64(all_false, t0, t1);
+ tcg_gen_and_i64(all_true, t0, t1);
+
+ tcg_gen_setcond_i64(TCG_COND_EQ, all_false, all_false, zero);
+ tcg_gen_shli_i64(all_false, all_false, 1);
+ tcg_gen_setcond_i64(TCG_COND_EQ, all_true, all_true, mask);
+ tcg_gen_shli_i64(all_true, all_true, 3);
+
+ tcg_gen_or_i64(t0, all_false, all_true);
+ tcg_gen_extrl_i64_i32(cpu_crf[a->bf], t0);
+
+ tcg_temp_free_i64(xb);
+ tcg_temp_free_i64(t0);
+ tcg_temp_free_i64(t1);
+ tcg_temp_free_i64(all_true);
+ tcg_temp_free_i64(all_false);
+
+ return true;
+}
+
static void gen_xxsldwi(DisasContext *ctx)
{
TCGv_i64 xth, xtl;
--
2.34.1
- [PULL 31/87] target/ppc: implement vrlq, (continued)
- [PULL 31/87] target/ppc: implement vrlq, Cédric Le Goater, 2022/03/02
- [PULL 32/87] target/ppc: implement vrlqnm, Cédric Le Goater, 2022/03/02
- [PULL 24/87] target/ppc: implement vgnb, Cédric Le Goater, 2022/03/02
- [PULL 26/87] target/ppc: implement vslq, Cédric Le Goater, 2022/03/02
- [PULL 29/87] target/ppc: move vrl[bhwd] to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 30/87] target/ppc: move vrl[bhwd]nm/vrl[bhwd]mi to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 37/87] target/ppc: Move xxpermdi to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 47/87] target/ppc: Implement xscmp{eq,ge,gt}qp, Cédric Le Goater, 2022/03/02
- [PULL 25/87] target/ppc: move vs[lr][a][bhwd] to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 36/87] target/ppc: move xxperm/xxpermr to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 44/87] target/ppc: Implement xvtlsbb instruction,
Cédric Le Goater <=
- [PULL 38/87] target/ppc: Implement xxpermx instruction, Cédric Le Goater, 2022/03/02
- [PULL 52/87] target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions, Cédric Le Goater, 2022/03/02
- [PULL 57/87] ppc/xive2: Introduce a presenter matching routine, Cédric Le Goater, 2022/03/02
- [PULL 58/87] ppc/pnv: Add a XIVE2 controller to the POWER10 chip, Cédric Le Goater, 2022/03/02
- [PULL 41/87] target/ppc: Implement xxgenpcv[bhwd]m instruction, Cédric Le Goater, 2022/03/02
- [PULL 65/87] ppc/xive: Add support for PQ state bits offload, Cédric Le Goater, 2022/03/02
- [PULL 79/87] hw/ppc/spapr_drc.c: use g_auto in spapr_dt_drc(), Cédric Le Goater, 2022/03/02
- [PULL 80/87] hw/ppc/spapr_drc.c: use g_autofree in drc_realize(), Cédric Le Goater, 2022/03/02
- [PULL 53/87] target/ppc: implement plxsd/pstxsd, Cédric Le Goater, 2022/03/02
- [PULL 62/87] ppc/pnv: Add a HOMER model to POWER10, Cédric Le Goater, 2022/03/02