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[PULL 03/16] hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved dur
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 03/16] hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration |
Date: |
Mon, 7 Mar 2022 11:11:54 +0100 |
From: Bernhard Beschow <shentey@gmail.com>
Based on commit e735b55a8c11dd455e31ccd4420e6c9485191d0c:
piix_pci: eliminate PIIX3State::pci_irq_levels
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
The IRQ levels in the PCIBus layer are already preserved during
migration. By reusing them and rather than having a redundant implementation
the bug is avoided in the first place.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220217101924.15347-2-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/gt64xxx_pci.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
index c7480bd019..4cbd0911f5 100644
--- a/hw/mips/gt64xxx_pci.c
+++ b/hw/mips/gt64xxx_pci.c
@@ -1006,14 +1006,11 @@ static int gt64120_pci_map_irq(PCIDevice *pci_dev, int
irq_num)
}
}
-static int pci_irq_levels[4];
-
static void gt64120_pci_set_irq(void *opaque, int irq_num, int level)
{
int i, pic_irq, pic_level;
qemu_irq *pic = opaque;
-
- pci_irq_levels[irq_num] = level;
+ PCIBus *bus = pci_get_bus(piix4_dev);
/* now we change the pic irq level according to the piix irq mappings */
/* XXX: optimize */
@@ -1023,7 +1020,7 @@ static void gt64120_pci_set_irq(void *opaque, int
irq_num, int level)
pic_level = 0;
for (i = 0; i < 4; i++) {
if (pic_irq == piix4_dev->config[PIIX_PIRQCA + i]) {
- pic_level |= pci_irq_levels[i];
+ pic_level |= pci_bus_get_irq_level(bus, i);
}
}
qemu_set_irq(pic[pic_irq], pic_level);
--
2.34.1
- [PULL 00/16] MIPS patches for 2022-03-07, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 01/16] target/mips: Fix cycle counter timing calculations, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 02/16] target/mips: Remove duplicated MIPSCPU::cp0_count_rate, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 03/16] hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration,
Philippe Mathieu-Daudé <=
- [PULL 04/16] malta: Move PCI interrupt handling from gt64xxx_pci to piix4, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 05/16] hw/isa/piix4: Resolve redundant i8259[] attribute, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 06/16] hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq(), Philippe Mathieu-Daudé, 2022/03/07
- [PULL 07/16] hw/isa/piix4: Resolve global instance variable, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 08/16] hw/isa/piix4: Replace some magic IRQ constants, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 09/16] hw/mips/gt64xxx_pci: Resolve gt64120_register(), Philippe Mathieu-Daudé, 2022/03/07
- [PULL 10/16] hw/rtc/mc146818rtc: QOM'ify IRQ number, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 11/16] hw/rtc/m48t59-isa: QOM'ify IRQ number, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 12/16] hw/input/pckbd: QOM'ify IRQ numbers, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 13/16] hw/isa/isa-bus: Remove isabus_dev_print(), Philippe Mathieu-Daudé, 2022/03/07