[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 11/16] hw/rtc/m48t59-isa: QOM'ify IRQ number
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 11/16] hw/rtc/m48t59-isa: QOM'ify IRQ number |
Date: |
Mon, 7 Mar 2022 11:12:02 +0100 |
From: Bernhard Beschow <shentey@gmail.com>
Exposing the IRQ number as a QOM property not only allows it to be
configurable but also to be printed by standard QOM mechanisms. This allows
isabus_dev_print() to be retired eventually.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220301220037.76555-3-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/rtc/m48t59-isa.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c
index dc21fb10a5..e9086eada4 100644
--- a/hw/rtc/m48t59-isa.c
+++ b/hw/rtc/m48t59-isa.c
@@ -42,6 +42,7 @@ struct M48txxISAState {
ISADevice parent_obj;
M48t59State state;
uint32_t io_base;
+ uint8_t isairq;
MemoryRegion io;
};
@@ -79,6 +80,7 @@ static void m48txx_isa_toggle_lock(Nvram *obj, int lock)
static Property m48t59_isa_properties[] = {
DEFINE_PROP_INT32("base-year", M48txxISAState, state.base_year, 0),
DEFINE_PROP_UINT32("iobase", M48txxISAState, io_base, 0x74),
+ DEFINE_PROP_UINT8("irq", M48txxISAState, isairq, 8),
DEFINE_PROP_END_OF_LIST(),
};
@@ -97,9 +99,14 @@ static void m48t59_isa_realize(DeviceState *dev, Error
**errp)
M48txxISAState *d = M48TXX_ISA(dev);
M48t59State *s = &d->state;
+ if (d->isairq >= ISA_NUM_IRQS) {
+ error_setg(errp, "Maximum value for \"irq\" is: %u", ISA_NUM_IRQS - 1);
+ return;
+ }
+
s->model = u->info.model;
s->size = u->info.size;
- isa_init_irq(isadev, &s->IRQ, 8);
+ isa_init_irq(isadev, &s->IRQ, d->isairq);
m48t59_realize_common(s, errp);
memory_region_init_io(&d->io, OBJECT(dev), &m48t59_io_ops, s, "m48t59", 4);
if (d->io_base != 0) {
--
2.34.1
- [PULL 01/16] target/mips: Fix cycle counter timing calculations, (continued)
- [PULL 01/16] target/mips: Fix cycle counter timing calculations, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 02/16] target/mips: Remove duplicated MIPSCPU::cp0_count_rate, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 03/16] hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 04/16] malta: Move PCI interrupt handling from gt64xxx_pci to piix4, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 05/16] hw/isa/piix4: Resolve redundant i8259[] attribute, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 06/16] hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq(), Philippe Mathieu-Daudé, 2022/03/07
- [PULL 07/16] hw/isa/piix4: Resolve global instance variable, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 08/16] hw/isa/piix4: Replace some magic IRQ constants, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 09/16] hw/mips/gt64xxx_pci: Resolve gt64120_register(), Philippe Mathieu-Daudé, 2022/03/07
- [PULL 10/16] hw/rtc/mc146818rtc: QOM'ify IRQ number, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 11/16] hw/rtc/m48t59-isa: QOM'ify IRQ number,
Philippe Mathieu-Daudé <=
- [PULL 12/16] hw/input/pckbd: QOM'ify IRQ numbers, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 13/16] hw/isa/isa-bus: Remove isabus_dev_print(), Philippe Mathieu-Daudé, 2022/03/07
- [PULL 14/16] isa: Drop unused attributes from ISADevice, Philippe Mathieu-Daudé, 2022/03/07
- [PULL 15/16] isa: Inline and remove one-line isa_init_irq(), Philippe Mathieu-Daudé, 2022/03/07
- [PULL 16/16] tests/avocado/linux_ssh_mips_malta.py: add missing accel (tcg) tag, Philippe Mathieu-Daudé, 2022/03/07
- Re: [PULL 00/16] MIPS patches for 2022-03-07, Philippe Mathieu-Daudé, 2022/03/07