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[PULL 10/23] target/i386: only include bits in pg_mode if they are not i
From: |
Paolo Bonzini |
Subject: |
[PULL 10/23] target/i386: only include bits in pg_mode if they are not ignored |
Date: |
Mon, 7 Mar 2022 19:16:20 +0100 |
LA57/PKE/PKS is only relevant in 64-bit mode, and NXE is only relevant if
PAE is in use. Since there is code that checks PG_MODE_LA57 to determine
the canonicality of addresses, make sure that the bit is not set by
mistake in 32-bit mode. While it would not be a problem because 32-bit
addresses by definition fit in both 48-bit and 57-bit address spaces,
it is nicer if get_pg_mode() actually returns whether a feature is enabled,
and it allows a few simplifications in the page table walker.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/sysemu/excp_helper.c | 34 ++++++++++++++--------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/target/i386/tcg/sysemu/excp_helper.c
b/target/i386/tcg/sysemu/excp_helper.c
index 5ba739fbed..0410170d64 100644
--- a/target/i386/tcg/sysemu/excp_helper.c
+++ b/target/i386/tcg/sysemu/excp_helper.c
@@ -24,32 +24,35 @@
int get_pg_mode(CPUX86State *env)
{
int pg_mode = 0;
+ if (!(env->cr[0] & CR0_PG_MASK)) {
+ return 0;
+ }
if (env->cr[0] & CR0_WP_MASK) {
pg_mode |= PG_MODE_WP;
}
if (env->cr[4] & CR4_PAE_MASK) {
pg_mode |= PG_MODE_PAE;
+ if (env->efer & MSR_EFER_NXE) {
+ pg_mode |= PG_MODE_NXE;
+ }
}
if (env->cr[4] & CR4_PSE_MASK) {
pg_mode |= PG_MODE_PSE;
}
- if (env->cr[4] & CR4_PKE_MASK) {
- pg_mode |= PG_MODE_PKE;
- }
- if (env->cr[4] & CR4_PKS_MASK) {
- pg_mode |= PG_MODE_PKS;
- }
if (env->cr[4] & CR4_SMEP_MASK) {
pg_mode |= PG_MODE_SMEP;
}
- if (env->cr[4] & CR4_LA57_MASK) {
- pg_mode |= PG_MODE_LA57;
- }
if (env->hflags & HF_LMA_MASK) {
pg_mode |= PG_MODE_LMA;
- }
- if (env->efer & MSR_EFER_NXE) {
- pg_mode |= PG_MODE_NXE;
+ if (env->cr[4] & CR4_PKE_MASK) {
+ pg_mode |= PG_MODE_PKE;
+ }
+ if (env->cr[4] & CR4_PKS_MASK) {
+ pg_mode |= PG_MODE_PKS;
+ }
+ if (env->cr[4] & CR4_LA57_MASK) {
+ pg_mode |= PG_MODE_LA57;
+ }
}
return pg_mode;
}
@@ -278,9 +281,7 @@ do_check_protect_pse36:
*prot |= PAGE_EXEC;
}
- if (!(pg_mode & PG_MODE_LMA)) {
- pkr = 0;
- } else if (ptep & PG_USER_MASK) {
+ if (ptep & PG_USER_MASK) {
pkr = pg_mode & PG_MODE_PKE ? env->pkru : 0;
} else {
pkr = pg_mode & PG_MODE_PKS ? env->pkrs : 0;
@@ -343,8 +344,7 @@ do_check_protect_pse36:
if (is_user)
error_code |= PG_ERROR_U_MASK;
if (is_write1 == 2 &&
- (((pg_mode & PG_MODE_NXE) && (pg_mode & PG_MODE_PAE)) ||
- (pg_mode & PG_MODE_SMEP)))
+ ((pg_mode & PG_MODE_NXE) || (pg_mode & PG_MODE_SMEP)))
error_code |= PG_ERROR_I_D_MASK;
return error_code;
}
--
2.34.1
- [PULL 00/23] QEMU changes for 7.0 soft freeze, Paolo Bonzini, 2022/03/07
- [PULL 05/23] qga/vss-win32: check old VSS SDK headers, Paolo Bonzini, 2022/03/07
- [PULL 16/23] x86: Add XFD faulting bit for state components, Paolo Bonzini, 2022/03/07
- [PULL 17/23] x86: Add AMX CPUIDs enumeration, Paolo Bonzini, 2022/03/07
- [PULL 06/23] qga/vss: update informative message about MinGW, Paolo Bonzini, 2022/03/07
- [PULL 15/23] x86: Grant AMX permission for guest, Paolo Bonzini, 2022/03/07
- [PULL 08/23] kvm-irqchip: introduce new API to support route change, Paolo Bonzini, 2022/03/07
- [PULL 09/23] kvm/msi: do explicit commit when adding msi routes, Paolo Bonzini, 2022/03/07
- [PULL 10/23] target/i386: only include bits in pg_mode if they are not ignored,
Paolo Bonzini <=
- [PULL 04/23] meson: fix generic location of vss headers, Paolo Bonzini, 2022/03/07
- [PULL 07/23] update meson-buildoptions.sh, Paolo Bonzini, 2022/03/07
- [PULL 18/23] x86: add support for KVM_CAP_XSAVE2 and AMX state migration, Paolo Bonzini, 2022/03/07
- [PULL 13/23] x86: Fix the 64-byte boundary enumeration for extended state, Paolo Bonzini, 2022/03/07
- [PULL 03/23] vmxcap: Add 5-level EPT bit, Paolo Bonzini, 2022/03/07
- [PULL 02/23] whpx: Fixed incorrect CR8/TPR synchronization, Paolo Bonzini, 2022/03/07
- [PULL 12/23] linux-headers: include missing changes from 5.17, Paolo Bonzini, 2022/03/07
- [PULL 11/23] target/i386: Throw a #SS when loading a non-canonical IST, Paolo Bonzini, 2022/03/07
- [PULL 19/23] x86: Support XFD and AMX xsave data migration, Paolo Bonzini, 2022/03/07
- [PULL 14/23] x86: Add AMX XTILECFG and XTILEDATA components, Paolo Bonzini, 2022/03/07